Some re-organizing.

TSConf-lite.qsf

@@ -363,12 +363,17 @@ set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:sys/build_id.tcl"
 set_global_assignment -name CDF_FILE jtag.cdf
 set_global_assignment -name QIP_FILE sys/sys.qip
 set_global_assignment -name QIP_FILE src/t80/T80.qip
-set_global_assignment -name VERILOG_FILE src/cpu/zsignals.v
+set_global_assignment -name VERILOG_FILE src/memory/dma.v
-set_global_assignment -name VERILOG_FILE src/cpu/zports.v
+set_global_assignment -name VERILOG_FILE src/memory/arbiter.v
-set_global_assignment -name VERILOG_FILE src/cpu/zmem.v
+set_global_assignment -name VERILOG_FILE src/memory/sdram.v
-set_global_assignment -name VERILOG_FILE src/cpu/zmaps.v
+set_global_assignment -name SYSTEMVERILOG_FILE src/memory/ddram.sv
-set_global_assignment -name VERILOG_FILE src/cpu/zint.v
+set_global_assignment -name VERILOG_FILE src/memory/dpram.v
-set_global_assignment -name VERILOG_FILE src/cpu/zclock.v
+set_global_assignment -name VERILOG_FILE src/common/zsignals.v
+set_global_assignment -name VERILOG_FILE src/common/zports.v
+set_global_assignment -name VERILOG_FILE src/common/zmem.v
+set_global_assignment -name VERILOG_FILE src/common/zmaps.v
+set_global_assignment -name VERILOG_FILE src/common/zint.v
+set_global_assignment -name VERILOG_FILE src/common/zclock.v
 set_global_assignment -name VERILOG_FILE src/rtc/mc146818a.v
 set_global_assignment -name VHDL_FILE src/sound/soundrive.vhd
 set_global_assignment -name QIP_FILE src/sound/jt12/jt12.qip
@@ -378,8 +383,6 @@ set_global_assignment -name SYSTEMVERILOG_FILE src/sound/turbosound.sv
 set_global_assignment -name VERILOG_FILE src/sound/gs.v
 set_global_assignment -name SYSTEMVERILOG_FILE src/sound/saa1099.sv
 set_global_assignment -name SYSTEMVERILOG_FILE src/sound/compressor.sv
-set_global_assignment -name VERILOG_FILE src/memory/dma.v
-set_global_assignment -name VERILOG_FILE src/memory/arbiter.v
 set_global_assignment -name VERILOG_FILE src/video/video_ts_render.v
 set_global_assignment -name VERILOG_FILE src/video/video_ts.v
 set_global_assignment -name VERILOG_FILE src/video/video_sync.v
@@ -392,10 +395,7 @@ set_global_assignment -name VERILOG_FILE src/video/video_top.v
 set_global_assignment -name VHDL_FILE src/keyboard.vhd
 set_global_assignment -name VERILOG_FILE src/kempston_mouse.v
 set_global_assignment -name VERILOG_FILE src/spi.v
-set_global_assignment -name VERILOG_FILE src/sdram.v
 set_global_assignment -name VERILOG_FILE src/clock.v
 set_global_assignment -name VERILOG_FILE src/tsconf.v
-set_global_assignment -name SYSTEMVERILOG_FILE ddram.sv
-set_global_assignment -name VERILOG_FILE dpram.v
 set_global_assignment -name SYSTEMVERILOG_FILE TSConf.sv
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

TSConf.qsf

@@ -362,12 +362,17 @@ set_global_assignment -name CDF_FILE jtag.cdf
 set_global_assignment -name QIP_FILE sys/sys.qip
 set_global_assignment -name QSYS_FILE sys/vip.qsys
 set_global_assignment -name QIP_FILE src/t80/T80.qip
-set_global_assignment -name VERILOG_FILE src/cpu/zsignals.v
+set_global_assignment -name VERILOG_FILE src/memory/dma.v
-set_global_assignment -name VERILOG_FILE src/cpu/zports.v
+set_global_assignment -name VERILOG_FILE src/memory/arbiter.v
-set_global_assignment -name VERILOG_FILE src/cpu/zmem.v
+set_global_assignment -name VERILOG_FILE src/memory/sdram.v
-set_global_assignment -name VERILOG_FILE src/cpu/zmaps.v
+set_global_assignment -name SYSTEMVERILOG_FILE src/memory/ddram.sv
-set_global_assignment -name VERILOG_FILE src/cpu/zint.v
+set_global_assignment -name VERILOG_FILE src/memory/dpram.v
-set_global_assignment -name VERILOG_FILE src/cpu/zclock.v
+set_global_assignment -name VERILOG_FILE src/common/zsignals.v
+set_global_assignment -name VERILOG_FILE src/common/zports.v
+set_global_assignment -name VERILOG_FILE src/common/zmem.v
+set_global_assignment -name VERILOG_FILE src/common/zmaps.v
+set_global_assignment -name VERILOG_FILE src/common/zint.v
+set_global_assignment -name VERILOG_FILE src/common/zclock.v
 set_global_assignment -name VERILOG_FILE src/rtc/mc146818a.v
 set_global_assignment -name VHDL_FILE src/sound/soundrive.vhd
 set_global_assignment -name QIP_FILE src/sound/jt12/jt12.qip
@@ -377,8 +382,6 @@ set_global_assignment -name SYSTEMVERILOG_FILE src/sound/turbosound.sv
 set_global_assignment -name VERILOG_FILE src/sound/gs.v
 set_global_assignment -name SYSTEMVERILOG_FILE src/sound/saa1099.sv
 set_global_assignment -name SYSTEMVERILOG_FILE src/sound/compressor.sv
-set_global_assignment -name VERILOG_FILE src/memory/dma.v
-set_global_assignment -name VERILOG_FILE src/memory/arbiter.v
 set_global_assignment -name VERILOG_FILE src/video/video_ts_render.v
 set_global_assignment -name VERILOG_FILE src/video/video_ts.v
 set_global_assignment -name VERILOG_FILE src/video/video_sync.v
@@ -391,10 +394,7 @@ set_global_assignment -name VERILOG_FILE src/video/video_top.v
 set_global_assignment -name VHDL_FILE src/keyboard.vhd
 set_global_assignment -name VERILOG_FILE src/kempston_mouse.v
 set_global_assignment -name VERILOG_FILE src/spi.v
-set_global_assignment -name VERILOG_FILE src/sdram.v
 set_global_assignment -name VERILOG_FILE src/clock.v
 set_global_assignment -name VERILOG_FILE src/tsconf.v
-set_global_assignment -name SYSTEMVERILOG_FILE ddram.sv
-set_global_assignment -name VERILOG_FILE dpram.v
 set_global_assignment -name SYSTEMVERILOG_FILE TSConf.sv
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

src/sound/gs105b.mif

@@ -2,7 +2,7 @@
 --
 -- Generated automatically by srec -o --mif
 --
-DEPTH = 32768;
+DEPTH = 65536;
 WIDTH = 8;
 ADDRESS_RADIX = HEX;
 DATA_RADIX = HEX;
@@ -1379,4 +1379,5 @@ CONTENT BEGIN
 7FC8: 85 0A 88 0A 8B 0A 8D 0A 90 0A 93 0A 95 0A 98 0A 9B 0A 9E 0A A0 0A A3 0A;
 7FE0: A6 0A A8 0A AB 0A AE 0A B0 0A B3 0A B6 0A B9 0A BB 0A BE 0A C1 0A C3 0A;
 7FF8: C6 0A C9 0A CB 0A CE 0A;
+[8000..FFFF]: 00;
 END;

src/tsconf.v

@@ -675,7 +675,7 @@ zint TS13
    
 // BIOS
 wire [7:0] bios_do_bus;
-dpram #(.ADDRWIDTH(16), .MEM_INIT_FILE("tsbios.mif")) BIOS
+dpram #(.ADDRWIDTH(16), .MEM_INIT_FILE("src/tsbios.mif")) BIOS
 (
 	.clock(clk),
 	.address_a({cpu_addr_20[14:0],cpu_wrbsel}),