From c9c9f4265a3d9e47ee681da59ea12fc6033e5beb Mon Sep 17 00:00:00 2001 From: sorgelig Date: Fri, 24 Aug 2018 03:09:04 +0800 Subject: [PATCH] Some re-organizing. --- TSConf-lite.qsf | 22 +++++++++++----------- TSConf.qsf | 22 +++++++++++----------- src/{cpu => common}/zclock.v | 0 src/{cpu => common}/zint.v | 0 src/{cpu => common}/zmaps.v | 0 src/{cpu => common}/zmem.v | 0 src/{cpu => common}/zports.v | 0 src/{cpu => common}/zsignals.v | 0 ddram.sv => src/memory/ddram.sv | 0 dpram.v => src/memory/dpram.v | 0 src/{ => memory}/sdram.v | 0 src/sound/gs105b.mif | 3 ++- tsbios.mif => src/tsbios.mif | 0 src/tsconf.v | 2 +- 14 files changed, 25 insertions(+), 24 deletions(-) rename src/{cpu => common}/zclock.v (100%) rename src/{cpu => common}/zint.v (100%) rename src/{cpu => common}/zmaps.v (100%) rename src/{cpu => common}/zmem.v (100%) rename src/{cpu => common}/zports.v (100%) rename src/{cpu => common}/zsignals.v (100%) rename ddram.sv => src/memory/ddram.sv (100%) rename dpram.v => src/memory/dpram.v (100%) rename src/{ => memory}/sdram.v (100%) rename tsbios.mif => src/tsbios.mif (100%) diff --git a/TSConf-lite.qsf b/TSConf-lite.qsf index d8ecb04..e3b2462 100644 --- a/TSConf-lite.qsf +++ b/TSConf-lite.qsf @@ -363,12 +363,17 @@ set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:sys/build_id.tcl" set_global_assignment -name CDF_FILE jtag.cdf set_global_assignment -name QIP_FILE sys/sys.qip set_global_assignment -name QIP_FILE src/t80/T80.qip -set_global_assignment -name VERILOG_FILE src/cpu/zsignals.v -set_global_assignment -name VERILOG_FILE src/cpu/zports.v -set_global_assignment -name VERILOG_FILE src/cpu/zmem.v -set_global_assignment -name VERILOG_FILE src/cpu/zmaps.v -set_global_assignment -name VERILOG_FILE src/cpu/zint.v -set_global_assignment -name VERILOG_FILE src/cpu/zclock.v +set_global_assignment -name VERILOG_FILE src/memory/dma.v +set_global_assignment -name VERILOG_FILE src/memory/arbiter.v +set_global_assignment -name VERILOG_FILE src/memory/sdram.v +set_global_assignment -name SYSTEMVERILOG_FILE src/memory/ddram.sv +set_global_assignment -name VERILOG_FILE src/memory/dpram.v +set_global_assignment -name VERILOG_FILE src/common/zsignals.v +set_global_assignment -name VERILOG_FILE src/common/zports.v +set_global_assignment -name VERILOG_FILE src/common/zmem.v +set_global_assignment -name VERILOG_FILE src/common/zmaps.v +set_global_assignment -name VERILOG_FILE src/common/zint.v +set_global_assignment -name VERILOG_FILE src/common/zclock.v set_global_assignment -name VERILOG_FILE src/rtc/mc146818a.v set_global_assignment -name VHDL_FILE src/sound/soundrive.vhd set_global_assignment -name QIP_FILE src/sound/jt12/jt12.qip @@ -378,8 +383,6 @@ set_global_assignment -name SYSTEMVERILOG_FILE src/sound/turbosound.sv set_global_assignment -name VERILOG_FILE src/sound/gs.v set_global_assignment -name SYSTEMVERILOG_FILE src/sound/saa1099.sv set_global_assignment -name SYSTEMVERILOG_FILE src/sound/compressor.sv -set_global_assignment -name VERILOG_FILE src/memory/dma.v -set_global_assignment -name VERILOG_FILE src/memory/arbiter.v set_global_assignment -name VERILOG_FILE src/video/video_ts_render.v set_global_assignment -name VERILOG_FILE src/video/video_ts.v set_global_assignment -name VERILOG_FILE src/video/video_sync.v @@ -392,10 +395,7 @@ set_global_assignment -name VERILOG_FILE src/video/video_top.v set_global_assignment -name VHDL_FILE src/keyboard.vhd set_global_assignment -name VERILOG_FILE src/kempston_mouse.v set_global_assignment -name VERILOG_FILE src/spi.v -set_global_assignment -name VERILOG_FILE src/sdram.v set_global_assignment -name VERILOG_FILE src/clock.v set_global_assignment -name VERILOG_FILE src/tsconf.v -set_global_assignment -name SYSTEMVERILOG_FILE ddram.sv -set_global_assignment -name VERILOG_FILE dpram.v set_global_assignment -name SYSTEMVERILOG_FILE TSConf.sv set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/TSConf.qsf b/TSConf.qsf index a2f85a9..f15b5f9 100644 --- a/TSConf.qsf +++ b/TSConf.qsf @@ -362,12 +362,17 @@ set_global_assignment -name CDF_FILE jtag.cdf set_global_assignment -name QIP_FILE sys/sys.qip set_global_assignment -name QSYS_FILE sys/vip.qsys set_global_assignment -name QIP_FILE src/t80/T80.qip -set_global_assignment -name VERILOG_FILE src/cpu/zsignals.v -set_global_assignment -name VERILOG_FILE src/cpu/zports.v -set_global_assignment -name VERILOG_FILE src/cpu/zmem.v -set_global_assignment -name VERILOG_FILE src/cpu/zmaps.v -set_global_assignment -name VERILOG_FILE src/cpu/zint.v -set_global_assignment -name VERILOG_FILE src/cpu/zclock.v +set_global_assignment -name VERILOG_FILE src/memory/dma.v +set_global_assignment -name VERILOG_FILE src/memory/arbiter.v +set_global_assignment -name VERILOG_FILE src/memory/sdram.v +set_global_assignment -name SYSTEMVERILOG_FILE src/memory/ddram.sv +set_global_assignment -name VERILOG_FILE src/memory/dpram.v +set_global_assignment -name VERILOG_FILE src/common/zsignals.v +set_global_assignment -name VERILOG_FILE src/common/zports.v +set_global_assignment -name VERILOG_FILE src/common/zmem.v +set_global_assignment -name VERILOG_FILE src/common/zmaps.v +set_global_assignment -name VERILOG_FILE src/common/zint.v +set_global_assignment -name VERILOG_FILE src/common/zclock.v set_global_assignment -name VERILOG_FILE src/rtc/mc146818a.v set_global_assignment -name VHDL_FILE src/sound/soundrive.vhd set_global_assignment -name QIP_FILE src/sound/jt12/jt12.qip @@ -377,8 +382,6 @@ set_global_assignment -name SYSTEMVERILOG_FILE src/sound/turbosound.sv set_global_assignment -name VERILOG_FILE src/sound/gs.v set_global_assignment -name SYSTEMVERILOG_FILE src/sound/saa1099.sv set_global_assignment -name SYSTEMVERILOG_FILE src/sound/compressor.sv -set_global_assignment -name VERILOG_FILE src/memory/dma.v -set_global_assignment -name VERILOG_FILE src/memory/arbiter.v set_global_assignment -name VERILOG_FILE src/video/video_ts_render.v set_global_assignment -name VERILOG_FILE src/video/video_ts.v set_global_assignment -name VERILOG_FILE src/video/video_sync.v @@ -391,10 +394,7 @@ set_global_assignment -name VERILOG_FILE src/video/video_top.v set_global_assignment -name VHDL_FILE src/keyboard.vhd set_global_assignment -name VERILOG_FILE src/kempston_mouse.v set_global_assignment -name VERILOG_FILE src/spi.v -set_global_assignment -name VERILOG_FILE src/sdram.v set_global_assignment -name VERILOG_FILE src/clock.v set_global_assignment -name VERILOG_FILE src/tsconf.v -set_global_assignment -name SYSTEMVERILOG_FILE ddram.sv -set_global_assignment -name VERILOG_FILE dpram.v set_global_assignment -name SYSTEMVERILOG_FILE TSConf.sv set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/src/cpu/zclock.v b/src/common/zclock.v similarity index 100% rename from src/cpu/zclock.v rename to src/common/zclock.v diff --git a/src/cpu/zint.v b/src/common/zint.v similarity index 100% rename from src/cpu/zint.v rename to src/common/zint.v diff --git a/src/cpu/zmaps.v b/src/common/zmaps.v similarity index 100% rename from src/cpu/zmaps.v rename to src/common/zmaps.v diff --git a/src/cpu/zmem.v b/src/common/zmem.v similarity index 100% rename from src/cpu/zmem.v rename to src/common/zmem.v diff --git a/src/cpu/zports.v b/src/common/zports.v similarity index 100% rename from src/cpu/zports.v rename to src/common/zports.v diff --git a/src/cpu/zsignals.v b/src/common/zsignals.v similarity index 100% rename from src/cpu/zsignals.v rename to src/common/zsignals.v diff --git a/ddram.sv b/src/memory/ddram.sv similarity index 100% rename from ddram.sv rename to src/memory/ddram.sv diff --git a/dpram.v b/src/memory/dpram.v similarity index 100% rename from dpram.v rename to src/memory/dpram.v diff --git a/src/sdram.v b/src/memory/sdram.v similarity index 100% rename from src/sdram.v rename to src/memory/sdram.v diff --git a/src/sound/gs105b.mif b/src/sound/gs105b.mif index 424c878..2dff5c5 100644 --- a/src/sound/gs105b.mif +++ b/src/sound/gs105b.mif @@ -2,7 +2,7 @@ -- -- Generated automatically by srec -o --mif -- -DEPTH = 32768; +DEPTH = 65536; WIDTH = 8; ADDRESS_RADIX = HEX; DATA_RADIX = HEX; @@ -1379,4 +1379,5 @@ CONTENT BEGIN 7FC8: 85 0A 88 0A 8B 0A 8D 0A 90 0A 93 0A 95 0A 98 0A 9B 0A 9E 0A A0 0A A3 0A; 7FE0: A6 0A A8 0A AB 0A AE 0A B0 0A B3 0A B6 0A B9 0A BB 0A BE 0A C1 0A C3 0A; 7FF8: C6 0A C9 0A CB 0A CE 0A; +[8000..FFFF]: 00; END; diff --git a/tsbios.mif b/src/tsbios.mif similarity index 100% rename from tsbios.mif rename to src/tsbios.mif diff --git a/src/tsconf.v b/src/tsconf.v index b8ffb58..23406d6 100644 --- a/src/tsconf.v +++ b/src/tsconf.v @@ -675,7 +675,7 @@ zint TS13 // BIOS wire [7:0] bios_do_bus; -dpram #(.ADDRWIDTH(16), .MEM_INIT_FILE("tsbios.mif")) BIOS +dpram #(.ADDRWIDTH(16), .MEM_INIT_FILE("src/tsbios.mif")) BIOS ( .clock(clk), .address_a({cpu_addr_20[14:0],cpu_wrbsel}),