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https://github.com/UzixLS/zx-sizif-xxs.git
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add support for ZC SD card controller; replace NO-OS divmmc mode with ZC
This commit is contained in:
@ -2,7 +2,6 @@ package common;
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typedef enum { MACHINE_S48, MACHINE_S128, MACHINE_S3, MACHINE_PENT } machine_t;
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typedef enum { TURBO_NONE, TURBO_4, TURBO_5, TURBO_7, TURBO_14 } turbo_t;
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typedef enum { PANNING_MONO, PANNING_ABC, PANNING_ACB } panning_t;
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typedef enum { DIVMMC_OFF, DIVMMC_ON, DIVMMC_NOOS } divmmc_t;
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endpackage
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@ -6,11 +6,13 @@ module divmmc(
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input ck7,
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input en,
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input en_hooks,
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input en_zc,
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cpu_bus bus,
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output [7:0] d_out,
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output d_out_active,
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input sd_cd,
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input sd_miso,
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output sd_mosi,
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output reg sd_sck,
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@ -61,21 +63,20 @@ always @(posedge clk28 or negedge rst_n) begin
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end
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end
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reg spi_rd;
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reg conmem, mapram;
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wire port_e3_cs = en && bus.ioreq && bus.a_reg[7:0] == 8'hE3;
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wire port_e7_cs = en && bus.ioreq && bus.a_reg[7:0] == 8'hE7;
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wire port_eb_cs = en && bus.ioreq && bus.a_reg[7:0] == 8'hEB;
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wire port_57_cs = en_zc && bus.ioreq && bus.a_reg[7:0] == 8'h57;
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wire port_77_cs = en_zc && bus.ioreq && bus.a_reg[7:0] == 8'h77;
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always @(posedge clk28 or negedge rst_n) begin
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if (!rst_n) begin
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spi_rd <= 0;
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page <= 0;
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mapram <= 0;
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conmem <= 0;
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sd_cs <= 1'b1;
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end
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else begin
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spi_rd <= port_eb_cs && bus.rd;
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if (port_e3_cs && bus.wr) begin
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page <= bus.d_reg[3:0];
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mapram <= bus.d_reg[6] | mapram;
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@ -84,6 +85,22 @@ always @(posedge clk28 or negedge rst_n) begin
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if (port_e7_cs && bus.wr) begin
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sd_cs <= bus.d_reg[0];
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end
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else if (port_77_cs && bus.wr) begin
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sd_cs <= bus.d_reg[1] | ~bus.d_reg[0];
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end
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end
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end
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reg spi_rd, zc_rd;
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wire [7:0] zc_data = {7'b0000000, sd_cd};
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always @(posedge clk28 or negedge rst_n) begin
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if (!rst_n) begin
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spi_rd <= 0;
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zc_rd <= 0;
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end
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else begin
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spi_rd <= (port_eb_cs || port_57_cs) && bus.rd;
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zc_rd <= port_77_cs && bus.rd;
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end
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end
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@ -93,7 +110,7 @@ assign cpuwait = ~spi_cnt[3];
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always @(posedge clk28 or negedge rst_n) begin
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if (!rst_n)
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spi_cnt <= 0;
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else if (port_eb_cs && (bus.rd || bus.wr))
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else if ((port_eb_cs || port_57_cs) && (bus.rd || bus.wr))
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spi_cnt <= 4'b1110;
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else if (spi_cnt_en && ck7)
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spi_cnt <= spi_cnt + 1'b1;
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@ -103,7 +120,7 @@ reg spi_mosi_en;
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always @(posedge clk28 or negedge rst_n) begin
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if (!rst_n)
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spi_mosi_en <= 0;
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else if (port_eb_cs && bus.wr)
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else if ((port_eb_cs || port_57_cs) && bus.wr)
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spi_mosi_en <= 1'b1;
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else if (!spi_cnt_en)
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spi_mosi_en <= 0;
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@ -114,7 +131,7 @@ assign sd_mosi = spi_mosi_en? spi_reg[7] : 1'b1;
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always @(posedge clk28 or negedge rst_n) begin
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if (!rst_n)
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spi_reg <= 0;
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else if (port_eb_cs && bus.wr)
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else if ((port_eb_cs || port_57_cs) && bus.wr)
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spi_reg <= bus.d_reg;
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else if (spi_cnt[3] == 1'b0 && ck7)
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spi_reg[7:0] <= {spi_reg[6:0], sd_miso};
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@ -136,7 +153,7 @@ assign ramwr_mask =
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(!bus.a[13] || page == 4'b0011) &&
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!conmem && automap && mapram;
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assign d_out_active = spi_rd;
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assign d_out = spi_reg;
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assign d_out_active = zc_rd | spi_rd;
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assign d_out = zc_rd? zc_data : spi_reg;
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endmodule
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@ -13,7 +13,6 @@ module magic(
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input magic_button,
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input pause_button,
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input sd_cd,
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input div_automap,
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output reg magic_mode,
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@ -25,7 +24,8 @@ module magic(
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output turbo_t turbo,
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output panning_t panning,
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output reg joy_sinclair,
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output divmmc_t divmmc_en,
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output reg divmmc_en,
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output reg zc_en,
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output reg ulaplus_en,
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output reg ay_en,
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output reg covox_en,
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@ -80,7 +80,8 @@ always @(posedge clk28 or negedge rst_n) begin
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turbo <= TURBO_NONE;
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panning <= PANNING_ABC;
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joy_sinclair <= 0;
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divmmc_en <= DIVMMC_NOOS;
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divmmc_en <= 0;
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zc_en <= 1'b1;
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ulaplus_en <= 1'b1;
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ay_en <= 1'b1;
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covox_en <= 1'b1;
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@ -93,14 +94,14 @@ always @(posedge clk28 or negedge rst_n) begin
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8'h04: panning <= panning_t'(bus.d_reg[1:0]);
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8'h07: joy_sinclair <= bus.d_reg[0];
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8'h08: ay_en <= bus.d_reg[0];
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8'h09: divmmc_en <= divmmc_t'(bus.d_reg[1:0]);
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8'h09: {zc_en, divmmc_en} <= bus.d_reg[1:0];
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8'h0a: ulaplus_en <= bus.d_reg[0];
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8'h0b: {soundrive_en, covox_en} <= bus.d_reg[1:0];
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endcase
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end
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reg config_rd;
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wire [7:0] config_data = {4'b0000, div_automap, sd_cd, pause_button, magic_button};
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wire [7:0] config_data = {4'b0000, div_automap, 1'b1, pause_button, magic_button};
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always @(posedge clk28 or negedge rst_n) begin
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if (!rst_n)
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config_rd <= 0;
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@ -234,7 +234,8 @@ wire magic_dout_active;
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wire magic_mode, magic_map;
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wire joy_sinclair, up_en, ay_en, covox_en, soundrive_en;
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panning_t panning;
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divmmc_t divmmc_en;
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wire divmmc_en, zc_en;
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magic magic0(
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.rst_n(n_rstcpu),
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.clk28(clk28),
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@ -249,7 +250,6 @@ magic magic0(
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.magic_button(ps2_key_magic),
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.pause_button(ps2_key_pause),
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.sd_cd(sd_cd),
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.div_automap(div_automap),
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.magic_mode(magic_mode),
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@ -262,6 +262,7 @@ magic magic0(
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.joy_sinclair(joy_sinclair),
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.panning(panning),
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.divmmc_en(divmmc_en),
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.zc_en(zc_en),
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.ulaplus_en(up_en),
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.ay_en(ay_en),
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.covox_en(covox_en),
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@ -387,13 +388,15 @@ divmmc divmmc0(
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.clk28(clk28),
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.ck14(ck14),
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.ck7(ck7),
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.en(divmmc_en == DIVMMC_ON || divmmc_en == DIVMMC_NOOS),
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.en_hooks(divmmc_en == DIVMMC_ON),
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.en(divmmc_en),
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.en_hooks(divmmc_en),
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.en_zc(zc_en),
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.bus(bus),
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.d_out(div_dout),
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.d_out_active(div_dout_active),
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.sd_cd(sd_cd),
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.sd_miso(sd_miso_tape_in),
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.sd_mosi(sd_mosi0),
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.sd_sck(sd_sck),
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@ -410,7 +413,7 @@ divmmc divmmc0(
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.ramwr_mask(div_ramwr_mask),
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.cpuwait(div_wait)
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);
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assign sd_mosi_tape_out = (divmmc_en == DIVMMC_OFF)? tape_out : sd_mosi0;
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assign sd_mosi_tape_out = (!divmmc_en && !zc_en)? tape_out : sd_mosi0;
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/* ULAPLUS */
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@ -498,7 +501,7 @@ memcontrol memcontrol0(
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.port_1ffd(port_1ffd),
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.port_dffd(port_dffd),
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.rampage_ext(rampage_ext),
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.divmmc_en(divmmc_en != DIVMMC_OFF),
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.divmmc_en(divmmc_en),
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.div_ram(div_ram),
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.div_map(div_map),
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.div_ramwr_mask(div_ramwr_mask),
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@ -3,9 +3,9 @@ bank00=128-0.rom # 0x00000
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bank01=128-1.rom # 0x04000
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bank02=../rom_src/main.bin # 0x08000
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bank03=ESXMMC.BIN ESXMMC.BIN # 0x0C000
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bank04=dvmen3e0.rom # 0x10000
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bank05=dvmen3e1.rom # 0x14000
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bank06=dvmen3e2.rom # 0x18000
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bank04=zcen3e0.rom # 0x10000
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bank05=zcen3e1.rom # 0x14000
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bank06=zcen3e2.rom # 0x18000
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bank07=zero8k.bin zero8k.bin # 0x1C000
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sizif.rom: ${bank00} ${bank01} ${bank02} ${bank03} ${bank04} ${bank05} ${bank06} ${bank07}
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Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -28,7 +28,7 @@ _reserv2 DB 0
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_reserv3 DB 0
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joystick DB 0
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ay DB 1
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divmmc DB 2
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sd DB 2
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ulaplus DB 1
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dac DB 3
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ENDS
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@ -237,17 +237,16 @@ init_cpld:
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detect_sd_card:
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ld a, #ff ; read sd_cd state in bit 2 of #FFFF port
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in a, (#ff) ; ...
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bit 2, a ; check sd_cd == 0 (card is insert)
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in a, (#77) ; read sd_cd state from ZC status port
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bit 0, a ; check sd_cd == 0 (card is insert)
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jr z, .is_insert ; yes?
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.no_card:
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xor a ; divmmc = OFF
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ld (cfg_saved.divmmc), a ; ...
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xor a ; sd = OFF
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ld (cfg_saved.sd), a ; ...
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ret
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.is_insert:
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ld a, 1 ; divmmc = ON
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ld (cfg_saved.divmmc), a ; ...
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ld a, 1 ; sd = divmmc
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ld (cfg_saved.sd), a ; ...
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ret
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@ -34,7 +34,7 @@ menudefault: MENU_DEF 20
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MENUENTRY_T str_machine menu_machine_value_cb menu_machine_cb
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MENUENTRY_T str_panning menu_panning_value_cb menu_panning_cb
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MENUENTRY_T str_joystick menu_joystick_value_cb menu_joystick_cb
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MENUENTRY_T str_divmmc menu_divmmc_value_cb menu_divmmc_cb
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MENUENTRY_T str_sd menu_sd_value_cb menu_sd_cb
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MENUENTRY_T str_ulaplus menu_ulaplus_value_cb menu_ulaplus_cb
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MENUENTRY_T str_dac menu_dac_value_cb menu_dac_cb
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MENUENTRY_T str_exit menu_exit_value_cb menu_exit_cb
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@ -81,14 +81,14 @@ menu_joystick_value_cb:
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DW str_joystick_kempston_end-2
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DW str_joystick_sinclair_end-2
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menu_divmmc_value_cb:
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menu_sd_value_cb:
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ld ix, .values_table
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ld a, (cfg.divmmc)
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ld a, (cfg.sd)
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jp menu_value_get
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.values_table:
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DW str_off_end-2
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DW str_on_end-2
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DW str_divmmc_noos_end-2
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DW str_divmmc_end-2
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DW str_zc3e_end-2
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menu_ulaplus_value_cb:
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ld ix, .values_table
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@ -163,11 +163,11 @@ menu_joystick_cb:
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out (c), a
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ret
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menu_divmmc_cb:
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ld a, (cfg.divmmc)
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menu_sd_cb:
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ld a, (cfg.sd)
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ld c, 2
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call menu_handle_press
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ld (cfg.divmmc), a
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ld (cfg.sd), a
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ld bc, #09ff
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out (c), a
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ret
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@ -75,11 +75,14 @@ str_joystick_kempston_end:
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str_joystick_sinclair: DB "Sinclair",0
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str_joystick_sinclair_end:
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str_sd: DB "SD card",0
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str_sd_end:
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str_divmmc: DB "DivMMC",0
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str_divmmc_end:
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str_divmmc_noos: DB "NO OS",0
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str_divmmc_noos_end:
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str_zc3e: DB "ZC/+3e",0
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str_zc3e_end:
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str_ulaplus: DB "ULA+",0
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str_ulaplus_end
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