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update pcb rev.A and rev.A1 errata

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This commit is contained in:
Eugene Lozovoy
2025-01-28 21:25:53 +03:00
parent 85656da5b8
commit ee06137b9d
2 changed files with 8 additions and 0 deletions
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4
pcb/rev.A/ERRATA.txt
View File

@ -5,3 +5,7 @@
UPD. 2023-08-21:
4. R20 and R34 labels on silkscreen are misplaced
5. Incorrect 3.5mm jack footprint - left-right signals are swapped
UPD. 2025-01-28:
6. U21 should be 74AHCT1G125DB
7. Missing Z80 clock buffering. CPLD produce only up to 3.3V clock, while Z80 require 5V amplitude, and that may lead to unstable GS work. It's possible to use U14 for clock buffering.

4
pcb/rev.A1/ERRATA.txt
View File

@ -1,2 +1,6 @@
1. R20 and R34 lables on silkscreen are misplaced
2. Incorrect 3.5mm jack footprint - left-right signals are swapped
UPD. 2025-01-28:
3. U21 should be 74AHCT1G125DB
4. Missing Z80 clock buffering. CPLD produce only up to 3.3V clock, while Z80 require 5V amplitude, and that may lead to unstable GS work. It's possible to use U14 for clock buffering.