mirror of
https://github.com/UzixLS/zx-multisound.git
synced 2025-07-18 23:01:31 +03:00
add pcb rev.A1
This commit is contained in:
Eugene Lozovoy
@ -1,4 +1,4 @@
|
||||
REV = A
|
||||
REV = A1
|
||||
REVISION = rev_${REV}
|
||||
|
||||
.PHONY: build program clean
|
||||
|
||||
167
cpld/syn/rev_A1.qsf
Normal file
167
cpld/syn/rev_A1.qsf
Normal file
@ -0,0 +1,167 @@
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Copyright (C) 1991-2013 Altera Corporation
|
||||
# Your use of Altera Corporation's design tools, logic functions
|
||||
# and other software and tools, and its AMPP partner logic
|
||||
# functions, and any output files from any of the foregoing
|
||||
# (including device programming or simulation files), and any
|
||||
# associated documentation or information are expressly subject
|
||||
# to the terms and conditions of the Altera Program License
|
||||
# Subscription Agreement, Altera MegaCore Function License
|
||||
# Agreement, or other applicable license agreement, including,
|
||||
# without limitation, that your use is for the sole purpose of
|
||||
# programming logic devices manufactured by Altera and sold by
|
||||
# Altera or its authorized distributors. Please refer to the
|
||||
# applicable agreement for further details.
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Quartus II 64-Bit
|
||||
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version
|
||||
# Date created = 12:04:27 October 04, 2020
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
#
|
||||
# Notes:
|
||||
#
|
||||
# 1) The default values for assignments are stored in the file:
|
||||
# zx_multisound_assignment_defaults.qdf
|
||||
# If this file doesn't exist, see file:
|
||||
# assignment_defaults.qdf
|
||||
#
|
||||
# 2) Altera recommends that you do not modify this file. This
|
||||
# file is updated automatically by the Quartus II software
|
||||
# and any changes you make may be lost or overwritten.
|
||||
#
|
||||
# -------------------------------------------------------------------------- #
|
||||
|
||||
|
||||
set_global_assignment -name FAMILY MAX3000A
|
||||
set_global_assignment -name DEVICE "EPM3256ATC144-10"
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY zx_multisound
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:04:27 OCTOBER 04, 2020"
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output
|
||||
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
|
||||
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
|
||||
set_global_assignment -name SDC_FILE clocks.sdc
|
||||
set_global_assignment -name VERILOG_FILE ../rtl/top.v
|
||||
set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
|
||||
set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF
|
||||
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
|
||||
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
|
||||
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL"
|
||||
set_global_assignment -name SAVE_DISK_SPACE OFF
|
||||
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
|
||||
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
|
||||
set_location_assignment PIN_2 -to n_gram2
|
||||
set_location_assignment PIN_5 -to gma[17]
|
||||
set_location_assignment PIN_6 -to gma[16]
|
||||
set_location_assignment PIN_7 -to gma[18]
|
||||
set_location_assignment PIN_8 -to n_gram1
|
||||
set_location_assignment PIN_9 -to n_gm1
|
||||
set_location_assignment PIN_10 -to n_grst
|
||||
set_location_assignment PIN_11 -to ga[0]
|
||||
set_location_assignment PIN_12 -to ga[1]
|
||||
set_location_assignment PIN_14 -to ga[2]
|
||||
set_location_assignment PIN_15 -to ga[3]
|
||||
set_location_assignment PIN_16 -to ga[4]
|
||||
set_location_assignment PIN_18 -to ga[5]
|
||||
set_location_assignment PIN_19 -to ga[6]
|
||||
set_location_assignment PIN_21 -to ga[7]
|
||||
set_location_assignment PIN_22 -to ga[8]
|
||||
set_location_assignment PIN_23 -to ga[9]
|
||||
set_location_assignment PIN_25 -to ga[10]
|
||||
set_location_assignment PIN_27 -to n_gwr
|
||||
set_location_assignment PIN_28 -to n_grd
|
||||
set_location_assignment PIN_29 -to n_giorq
|
||||
set_location_assignment PIN_30 -to n_gmreq
|
||||
set_location_assignment PIN_31 -to ga[11]
|
||||
set_location_assignment PIN_32 -to ga[12]
|
||||
set_location_assignment PIN_34 -to ga[13]
|
||||
set_location_assignment PIN_35 -to ga[14]
|
||||
set_location_assignment PIN_36 -to ga[15]
|
||||
set_location_assignment PIN_37 -to gd[3]
|
||||
set_location_assignment PIN_38 -to gd[5]
|
||||
set_location_assignment PIN_39 -to gd[6]
|
||||
set_location_assignment PIN_40 -to gd[2]
|
||||
set_location_assignment PIN_41 -to gd[7]
|
||||
set_location_assignment PIN_42 -to gd[4]
|
||||
set_location_assignment PIN_43 -to gclk
|
||||
set_location_assignment PIN_44 -to n_gint
|
||||
set_location_assignment PIN_45 -to gd[0]
|
||||
set_location_assignment PIN_46 -to gd[1]
|
||||
set_location_assignment PIN_47 -to n_grom
|
||||
set_location_assignment PIN_48 -to gma[15]
|
||||
set_location_assignment PIN_49 -to cfg[0]
|
||||
set_location_assignment PIN_53 -to cfg[1]
|
||||
set_location_assignment PIN_54 -to cfg[2]
|
||||
set_location_assignment PIN_55 -to cfg[3]
|
||||
set_location_assignment PIN_56 -to cfg[4]
|
||||
set_location_assignment PIN_60 -to dac3_out
|
||||
set_location_assignment PIN_61 -to dac2_out
|
||||
set_location_assignment PIN_62 -to dac1_out
|
||||
set_location_assignment PIN_63 -to dac0_out
|
||||
set_location_assignment PIN_69 -to ym_m
|
||||
set_location_assignment PIN_70 -to fm1_ena
|
||||
set_location_assignment PIN_74 -to aa0
|
||||
set_location_assignment PIN_75 -to n_ard
|
||||
set_location_assignment PIN_78 -to n_awr
|
||||
set_location_assignment PIN_79 -to n_ym1_cs
|
||||
set_location_assignment PIN_80 -to n_ym2_cs
|
||||
set_location_assignment PIN_81 -to n_rstout
|
||||
set_location_assignment PIN_82 -to fm2_ena
|
||||
set_location_assignment PIN_83 -to ad[0]
|
||||
set_location_assignment PIN_84 -to ad[1]
|
||||
set_location_assignment PIN_86 -to ad[2]
|
||||
set_location_assignment PIN_87 -to ad[3]
|
||||
set_location_assignment PIN_88 -to ad[4]
|
||||
set_location_assignment PIN_90 -to ad[5]
|
||||
set_location_assignment PIN_91 -to ad[6]
|
||||
set_location_assignment PIN_92 -to ad[7]
|
||||
set_location_assignment PIN_93 -to n_saa_cs
|
||||
set_location_assignment PIN_96 -to saa_clk
|
||||
set_location_assignment PIN_97 -to midi_clk
|
||||
set_location_assignment PIN_98 -to a[14]
|
||||
set_location_assignment PIN_99 -to a[15]
|
||||
set_location_assignment PIN_100 -to a[12]
|
||||
set_location_assignment PIN_101 -to a[13]
|
||||
set_location_assignment PIN_102 -to d[7]
|
||||
set_location_assignment PIN_103 -to d[0]
|
||||
set_location_assignment PIN_106 -to d[1]
|
||||
set_location_assignment PIN_107 -to d[2]
|
||||
set_location_assignment PIN_108 -to n_dos
|
||||
set_location_assignment PIN_109 -to a[0]
|
||||
set_location_assignment PIN_110 -to d[6]
|
||||
set_location_assignment PIN_111 -to a[1]
|
||||
set_location_assignment PIN_112 -to d[5]
|
||||
set_location_assignment PIN_113 -to a[2]
|
||||
set_location_assignment PIN_116 -to d[3]
|
||||
set_location_assignment PIN_117 -to a[3]
|
||||
set_location_assignment PIN_118 -to d[4]
|
||||
set_location_assignment PIN_119 -to n_iorqge
|
||||
set_location_assignment PIN_120 -to n_mreq
|
||||
set_location_assignment PIN_121 -to n_iorq
|
||||
set_location_assignment PIN_122 -to n_rd
|
||||
set_location_assignment PIN_125 -to clkx
|
||||
set_location_assignment PIN_126 -to n_wr
|
||||
set_location_assignment PIN_127 -to rst_n
|
||||
set_location_assignment PIN_128 -to clk32
|
||||
set_location_assignment PIN_131 -to n_iodos
|
||||
set_location_assignment PIN_132 -to n_wait
|
||||
set_location_assignment PIN_133 -to a[7]
|
||||
set_location_assignment PIN_134 -to a[6]
|
||||
set_location_assignment PIN_136 -to a[5]
|
||||
set_location_assignment PIN_137 -to n_m1
|
||||
set_location_assignment PIN_138 -to a[4]
|
||||
set_location_assignment PIN_139 -to a[8]
|
||||
set_location_assignment PIN_140 -to a[9]
|
||||
set_location_assignment PIN_141 -to a[10]
|
||||
set_location_assignment PIN_142 -to a[11]
|
||||
set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE BALANCED
|
||||
set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF
|
||||
set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
|
||||
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
|
||||
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
|
||||
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
|
||||
@ -27,4 +27,5 @@ DATE = "11:12:50 November 18, 2022"
|
||||
|
||||
# Revisions
|
||||
|
||||
PROJECT_REVISION = "rev_A1"
|
||||
PROJECT_REVISION = "rev_A"
|
||||
|
||||
4414
out/bom_interactive.rev.A1.html
vendored
Normal file
4414
out/bom_interactive.rev.A1.html
vendored
Normal file
File diff suppressed because one or more lines are too long
BIN
out/cpld.rev.A1.pof
vendored
Normal file
BIN
out/cpld.rev.A1.pof
vendored
Normal file
Binary file not shown.
BIN
out/gerber.rev.A1.zip
vendored
Normal file
BIN
out/gerber.rev.A1.zip
vendored
Normal file
Binary file not shown.
BIN
out/pcb.rev.A1.pdf
vendored
Normal file
BIN
out/pcb.rev.A1.pdf
vendored
Normal file
Binary file not shown.
BIN
out/pcb3d.rev.A1.webp
vendored
Normal file
BIN
out/pcb3d.rev.A1.webp
vendored
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 188 KiB |
75976
pcb/rev.A1/zx-multisound.kicad_pcb
Normal file
75976
pcb/rev.A1/zx-multisound.kicad_pcb
Normal file
File diff suppressed because it is too large
Load Diff
504
pcb/rev.A1/zx-multisound.kicad_pro
Normal file
504
pcb/rev.A1/zx-multisound.kicad_pro
Normal file
@ -0,0 +1,504 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.15,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 2.7,
|
||||
"height": 4.7,
|
||||
"width": 4.7
|
||||
},
|
||||
"silk_line_width": 0.15,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 0.7999999999999999,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.254
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [
|
||||
{
|
||||
"gap": 0.0,
|
||||
"via_gap": 0.0,
|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
"drc_exclusions": [
|
||||
"courtyards_overlap|163583319|93546953|461c098d-5ef2-4710-b7e7-1b4cac04eb98|fc1882ae-cdb2-421f-84ed-e41643a40ced",
|
||||
"courtyards_overlap|163705626|94550001|00000000-0000-0000-0000-00005fd016b3|fc1882ae-cdb2-421f-84ed-e41643a40ced",
|
||||
"courtyards_overlap|164662081|93150001|00000000-0000-0000-0000-00005fd016b3|461c098d-5ef2-4710-b7e7-1b4cac04eb98",
|
||||
"courtyards_overlap|164744951|92174022|461c098d-5ef2-4710-b7e7-1b4cac04eb98|9ff37779-3212-44d7-9b38-1d22c63fa32b",
|
||||
"courtyards_overlap|166342910|93150001|00000000-0000-0000-0000-00005fd016b3|9ff37779-3212-44d7-9b38-1d22c63fa32b",
|
||||
"courtyards_overlap|166626121|92771412|06f1fc50-2841-4bab-80ec-68776c4bfdf6|9ff37779-3212-44d7-9b38-1d22c63fa32b",
|
||||
"courtyards_overlap|168261854|93150001|00000000-0000-0000-0000-00005fd016b3|06f1fc50-2841-4bab-80ec-68776c4bfdf6",
|
||||
"courtyards_overlap|185049729|113949999|7c932552-762b-4510-b874-56886a97d559|00000000-0000-0000-0000-00005fd016b3",
|
||||
"courtyards_overlap|185119999|113751649|00000000-0000-0000-0000-00005fd016b3|7c932552-762b-4510-b874-56886a97d559",
|
||||
"courtyards_overlap|202926317|92700001|00000000-0000-0000-0000-00005ec1f80d|3ad0db26-6b44-4a8c-ad53-445999de0de5",
|
||||
"courtyards_overlap|66699999|109599999|094b1503-68cb-424b-8a3b-da2750fc7a33|fee05b16-e5da-4916-9432-2d6fce15fe61",
|
||||
"courtyards_overlap|66849999|99950001|301c8515-8b23-4b91-b4b7-27d94e1bc3b2|32d60900-f078-4696-8f82-c885966975ef",
|
||||
"courtyards_overlap|68500001|109550001|00000000-0000-0000-0000-00005fc138df|fee05b16-e5da-4916-9432-2d6fce15fe61",
|
||||
"courtyards_overlap|72349999|106000001|c4774041-3d4f-40a6-a651-ffc25168064d|fee05b16-e5da-4916-9432-2d6fce15fe61",
|
||||
"courtyards_overlap|73400001|109550001|00000000-0000-0000-0000-00005fc13a65|fee05b16-e5da-4916-9432-2d6fce15fe61",
|
||||
"courtyards_overlap|76174999|86050001|00000000-0000-0000-0000-00005fa439c3|00000000-0000-0000-0000-00005fa44a08",
|
||||
"track_dangling|181400000|76400000|65ef1b5d-7b1e-400c-9667-3851e2594a4a|00000000-0000-0000-0000-000000000000",
|
||||
"track_dangling|190800000|124900000|139ec115-167f-45c1-a65b-6816b2444071|00000000-0000-0000-0000-000000000000",
|
||||
"track_dangling|199000000|124900000|d3675bc6-86d9-4bc2-900a-cee7a520ff50|00000000-0000-0000-0000-000000000000",
|
||||
"track_dangling|59900000|82350000|33a1b206-0737-4d3b-9ac5-5962d36acfb1|00000000-0000-0000-0000-000000000000",
|
||||
"track_dangling|62850000|78750000|68724279-4976-4721-9254-12b06eee99fe|00000000-0000-0000-0000-000000000000",
|
||||
"track_dangling|69875000|76075000|40465969-1e53-4863-a774-b332373cca4d|00000000-0000-0000-0000-000000000000",
|
||||
"track_dangling|71127500|82327500|3b7b13e7-10e9-4ed0-9a28-f06e77bc92a2|00000000-0000-0000-0000-000000000000",
|
||||
"track_dangling|81600000|73575000|3dfbffe7-fc34-46e9-88ff-4984106d95d7|00000000-0000-0000-0000-000000000000"
|
||||
],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "warning",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "ignore",
|
||||
"silk_overlap": "ignore",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
"rule_severitieslegacy_no_courtyard_defined": false,
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.19999999999999998,
|
||||
"min_hole_clearance": 0.3,
|
||||
"min_hole_to_hole": 0.3,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.15,
|
||||
"min_via_diameter": 0.6,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.2,
|
||||
0.5,
|
||||
0.8,
|
||||
1.0,
|
||||
1.5,
|
||||
2.0
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.6,
|
||||
"drill": 0.3
|
||||
},
|
||||
{
|
||||
"diameter": 0.8,
|
||||
"drill": 0.4
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [
|
||||
"lib_symbol_issues|1314450|2095500|1b6cfd74-e4ca-405b-8d71-145de972ccd4|00000000-0000-0000-0000-000000000000",
|
||||
"multiple_net_names|3663950|1625600|f3dc702d-d614-46cd-94c2-002711bca28f|12423dcb-4d58-4178-9513-1f0905e3d2f4",
|
||||
"multiple_net_names|4527550|1619250|65ccb4e9-d358-47ac-aa4b-d0fbe77fd5ba|f7bb2d31-9ce3-48ef-b2fa-eb58b659086b"
|
||||
],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "ignore",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "zx-multisound.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.2,
|
||||
"via_diameter": 0.6,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "power",
|
||||
"nets": [
|
||||
"+12V",
|
||||
"+3.3VA",
|
||||
"+5V",
|
||||
"+5VA",
|
||||
"GND"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.5,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_bus_thickness": 12.0,
|
||||
"default_junction_size": 40.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 39.0,
|
||||
"default_wire_thickness": 6.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.3,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.3
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "OrcadPCB2",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "${MYLIBPATH}/mykicadws2.kicad_wks",
|
||||
"plot_directory": "out/",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"eff1afb7-47ba-46af-a815-4a07fb8d674b",
|
||||
""
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
20063
pcb/rev.A1/zx-multisound.kicad_sch
Normal file
20063
pcb/rev.A1/zx-multisound.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user