update all pcb rev.A1 files - minor changes

This commit is contained in:
Eugene Lozovoy
2023-09-16 10:58:13 +03:00
parent e5e83baa8f
commit 9af2ae0c02
7 changed files with 118619 additions and 95114 deletions

View File

@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
@ -55,29 +56,33 @@
"width": 0.0
}
],
"drc_exclusions": [
"zone_has_empty_net|212000000|124700000|0d9785e9-668d-4e29-952c-a8052ab09508|00000000-0000-0000-0000-000000000000"
],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
@ -87,9 +92,14 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "ignore",
"silk_overlap": "error",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
@ -98,7 +108,6 @@
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
@ -106,20 +115,65 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.0,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
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},
{
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"td_target_name": "td_rect_shape",
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{
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"td_target_name": "td_track_end",
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}
],
"track_widths": [
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@ -132,7 +186,8 @@
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
@ -354,7 +409,7 @@
"net_settings": {
"classes": [
{
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"bus_width": 6,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
@ -368,13 +423,15 @@
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
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"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
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View File

@ -57,41 +57,22 @@
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@ -245,10 +226,7 @@
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@ -451,7 +429,7 @@
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"similar_labels": "warning",
"simulation_model_issue": "error",
"simulation_model_issue": "ignore",
"unannotated": "error",
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@ -541,8 +519,8 @@
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
"step": "out/kharon386_main.step",
"vrml": "out/kharon386_main.wrl"
},
"page_layout_descr_file": ""
},
@ -583,7 +561,7 @@
"workbook_filename": ""
},
"page_layout_descr_file": "${MYLIBPATH}/mykicadws2.kicad_wks",
"plot_directory": "",
"plot_directory": "out/",
"spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",

File diff suppressed because it is too large Load Diff

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@ -58,22 +58,10 @@
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@ -226,10 +214,7 @@
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@ -432,7 +417,7 @@
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"simulation_model_issue": "error",
"simulation_model_issue": "ignore",
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View File

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