Remove 21MHz clock.

This commit is contained in:
sorgelig
2018-08-18 06:24:26 +08:00
parent 4e2b71bd15
commit 44f8d8176e
8 changed files with 100 additions and 115 deletions

View File

@ -152,7 +152,6 @@ wire locked;
wire clk_mem;
wire clk_sys;
wire clk_28m;
wire clk_21m;
pll pll
(
@ -162,7 +161,6 @@ pll pll
.outclk_1(SDRAM_CLK),
.outclk_2(clk_sys),
.outclk_3(clk_28m),
.outclk_4(clk_21m),
.locked(locked)
);
@ -240,7 +238,6 @@ tsconf tsconf
(
.clk_84mhz(clk_mem),
.clk_28mhz(clk_28m),
.clk_21mhz(clk_21m),
.SDRAM_DQ(SDRAM_DQ),
.SDRAM_A(SDRAM_A),