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Some fixes and improvements.

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This commit is contained in:
sorgelig
2018-08-16 17:23:55 +08:00
parent 4fe409ba5b
commit 3904b85bcc
14 changed files with 2197 additions and 327 deletions
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2
sys/pll/pll_0002.v
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@ -32,7 +32,7 @@ module pll_0002(
.phase_shift0("0 ps"),
.duty_cycle0(50),
.output_clock_frequency1("84.000000 MHz"),
.phase_shift1("-4185 ps"),
.phase_shift1("-4357 ps"),
.duty_cycle1(50),
.output_clock_frequency2("56.000000 MHz"),
.phase_shift2("0 ps"),