fpga: prepare for new magic rom

fpga/rtl/common.sv

@@ -1,6 +1,7 @@
 package common;
-    typedef enum { TIMINGS_PENT, TIMINGS_S128, TIMINGS_S48 } timings_t;
-    typedef enum { TURBO_NONE, TURBO_7, TURBO_14 = 3 } turbo_t;
+    typedef enum { TIMINGS_PENT, TIMINGS_S48, TIMINGS_S128 } timings_t;
+    typedef enum { TURBO_NONE, TURBO_7, TURBO_14 } turbo_t;
+    typedef enum { RAM_512, RAM_48, RAM_128 } rammode_t;
 endpackage
 
 

fpga/rtl/divmmc.sv

@@ -41,7 +41,7 @@ always @(posedge clk28 or negedge rst_n) begin
             div_automap_next <= 0;
         end
         else if (
-                bus.a_reg == 16'h0000 || // power-on/reset/rst0/software restart
+                (bus.a == 16'h0000 && !magic_mode) || // power-on/reset/rst0/software restart
                 bus.a_reg == 16'h0008 || // syntax error
                 bus.a_reg == 16'h0038 || // im1 interrupt/rst #38
                 (bus.a_reg == 16'h0066 && !magic_mode) || // nmi routine

fpga/rtl/magic.sv

@@ -12,28 +12,29 @@ module magic(
 
     output reg magic_mode,
     output reg magic_map,
-    output magic_active_next,
 
-    output reg extlock,
+    output reg magic_reboot,
     output reg magic_beeper,
     output timings_t timings,
     output turbo_t turbo,
+    output rammode_t ram_mode,
     output reg joy_sinclair,
     output reg rom_plus3,
     output reg rom_alt48,
     output reg ay_abc,
-    output reg ay_mono
+    output reg ay_mono,
+    output reg divmmc_en
 );
 
-assign magic_active_next = magic_button;
 reg magic_unmap_next;
 reg magic_map_next;
 always @(posedge clk28 or negedge rst_n) begin
     if (!rst_n) begin
-        magic_mode <= 0;
-        magic_map <= 0;
-        magic_unmap_next <= 0;
+        n_nmi <= 1'b1;
+        magic_mode <= 1'b1;
+        magic_map <= 1'b1;
         magic_map_next <= 0;
+        magic_unmap_next <= 0;
     end
     else begin
         if (magic_button == 1'b1 && n_int == 1'b1 && n_int_next == 1'b0) begin
@@ -67,34 +68,30 @@ end
 wire config_cs = magic_map && bus.ioreq && bus.a_reg[7:0] == 8'hff;
 always @(posedge clk28 or negedge rst_n) begin
     if (!rst_n) begin
+        magic_reboot <= 0;
         magic_beeper <= 0;
-        extlock <= 0;
         timings <= TIMINGS_PENT;
         turbo <= TURBO_NONE;
         ay_abc <= 1'b1;
         ay_mono <= 0;
+        ram_mode <= RAM_512;
         rom_plus3 <= 0;
         rom_alt48 <= 0;
         joy_sinclair <= 0;
+        divmmc_en <= 1'b1;
     end
-    else if (config_cs && bus.wr) begin
-        if (bus.a_reg[15:12] == 4'h0)
-            magic_beeper <= bus.d_reg[0];
-        if (bus.a_reg[15:12] == 4'h1)
-            extlock <= bus.d_reg[0];
-        if (bus.a_reg[15:12] == 4'h2)
-            timings <= timings_t'(bus.d_reg[1:0]);
-        if (bus.a_reg[15:12] == 4'h3)
-            turbo <= turbo_t'(bus.d_reg[1:0]);
-        if (bus.a_reg[15:12] == 4'h4)
-            {ay_mono, ay_abc} <= bus.d_reg[1:0];
-        if (bus.a_reg[15:12] == 4'h5)
-            rom_plus3 <= bus.d_reg[0];
-        if (bus.a_reg[15:12] == 4'h6)
-            rom_alt48 <= bus.d_reg[0];
-        if (bus.a_reg[15:12] == 4'h7)
-            joy_sinclair <= bus.d_reg[0];
-    end
+    else if (config_cs && bus.wr) case (bus.a_reg[15:8])
+        8'h00: magic_reboot <= bus.d_reg[0];
+        8'h01: magic_beeper <= bus.d_reg[0];
+        8'h02: timings <= timings_t'(bus.d_reg[1:0]);
+        8'h03: turbo <= turbo_t'(bus.d_reg[1:0]);
+        8'h04: {ay_mono, ay_abc} <= bus.d_reg[1:0];
+        8'h05: rom_plus3 <= bus.d_reg[0];
+        8'h06: rom_alt48 <= bus.d_reg[0];
+        8'h07: joy_sinclair <= bus.d_reg[0];
+        8'h08: ram_mode <= rammode_t'(bus.d_reg[1:0]);
+        8'h09: divmmc_en <= bus.d_reg[0];
+    endcase
 end
 
 

fpga/rtl/ports.sv

@@ -18,7 +18,7 @@ module ports(
     input [7:0] attr_next,
     input [4:0] kd,
     input [7:0] kempston_data,
-    input magic_active_next,
+    input magic_button,
     input tape_in,
 
     output reg tape_out,
@@ -56,7 +56,7 @@ always @(posedge clk28 or negedge rst_n) begin
 end
 
 reg [4:0] kd0;
-wire [7:0] port_fe_data = {~magic_active_next, tape_in, 1'b1, kd0};
+wire [7:0] port_fe_data = {~magic_button, tape_in, 1'b1, kd0};
 always @(posedge clk28 or negedge rst_n) begin
     if (!rst_n) begin
         beeper <= 0;

fpga/rtl/top.sv

@@ -50,10 +50,11 @@ pll pll0(.inclk0(clk_in), .c0(clk40), .c1(clk20), .locked(rst_n));
 /* SHARED DEFINITIONS */
 timings_t timings;
 turbo_t turbo;
+rammode_t ram_mode;
 wire ps2_key_pause, ps2_key_reset;
 wire pause = ps2_key_pause;
 wire [2:0] border;
-wire magic_beeper;
+wire magic_reboot, magic_beeper;
 wire up_en;
 wire clkwait;
 wire [2:0] rampage128;
@@ -98,7 +99,7 @@ assign bus.memreq = bus_memreq & ~n_mreq;
 /* RESET */
 reg usrrst_n = 0;
 always @(posedge clk28)
-    usrrst_n <= (!rst_n || ps2_key_reset)? 1'b0 : 1'b1;
+    usrrst_n <= (!rst_n || ps2_key_reset || magic_reboot)? 1'b0 : 1'b1;
 
 
 
@@ -228,8 +229,7 @@ cpucontrol cpucontrol0(
 
 /* MAGIC */
 wire magic_mode, magic_map;
-wire magic_active_next;
-wire extlock, joy_sinclair, rom_plus3, rom_alt48, ay_abc, ay_mono;
+wire divmmc_en, joy_sinclair, rom_plus3, rom_alt48, ay_abc, ay_mono;
 magic magic0(
     .rst_n(usrrst_n),
     .clk28(clk28),
@@ -243,17 +243,18 @@ magic magic0(
 
     .magic_mode(magic_mode),
     .magic_map(magic_map),
-    .magic_active_next(magic_active_next),
 
-    .extlock(extlock),
+    .magic_reboot(magic_reboot),
     .magic_beeper(magic_beeper),
     .timings(timings),
     .turbo(turbo),
+    .ram_mode(ram_mode),
     .joy_sinclair(joy_sinclair),
     .rom_plus3(rom_plus3),
     .rom_alt48(rom_alt48),
     .ay_abc(ay_abc),
-    .ay_mono(ay_mono)
+    .ay_mono(ay_mono),
+    .divmmc_en(divmmc_en)
 );
 
 
@@ -275,9 +276,9 @@ ports ports0 (
     .d_out(ports_dout),
     .d_out_active(ports_dout_active),
 
-    .en_128k(1'b1),
+    .en_128k(ram_mode == RAM_512 || ram_mode == RAM_128),
     .en_plus3(rom_plus3),
-    .en_profi(!extlock),
+    .en_profi(ram_mode == RAM_512),
     .en_kempston(!joy_sinclair),
     .en_sinclair(joy_sinclair),
 
@@ -287,7 +288,7 @@ ports ports0 (
     .attr_next(attr_next),
     .kd(ps2_kd),
     .kempston_data({3'b000, ps2_joy_fire, ps2_joy_up, ps2_joy_down, ps2_joy_left, ps2_joy_right}),
-    .magic_active_next(magic_active_next),
+    .magic_button(ps2_key_magic),
     .tape_in(sd_miso_tape_in),
 
     .tape_out(tape_out),
@@ -333,8 +334,8 @@ wire [7:0] soundrive_l0, soundrive_l1, soundrive_r0, soundrive_r1;
 soundrive soundrive0(
     .rst_n(usrrst_n),
     .clk28(clk28),
-    .en_covox(!extlock),
-    .en_soundrive(!extlock),
+    .en_covox(1'b1),
+    .en_soundrive(1'b1),
 
     .bus(bus),
 
@@ -382,7 +383,7 @@ divmmc divmmc0(
     .clk28(clk28),
     .ck14(ck14),
     .ck7(ck7),
-    .en(!extlock),
+    .en(divmmc_en),
     .en_hooks(~sd_cd),
 
     .bus(bus),
@@ -414,8 +415,8 @@ wire [7:0] up_dout;
 ulaplus ulaplus0(
     .rst_n(usrrst_n),
     .clk28(clk28),
-    .en(!extlock),
-
+    .en(1'b1),
+    
     .bus(bus),
     .d_out(up_dout),
     .d_out_active(up_dout_active),