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mirror of https://github.com/UzixLS/zx-sizif-xxs.git synced 2025-07-19 07:11:28 +03:00

replace composite video output implementation

New one is borrowed from Speccy 2010 project. It's have a much, much
better output quality in price of increased FPGA resources usage.
This commit is contained in:
UzixLS
2021-11-15 22:57:36 +03:00
parent f30d6faa6d
commit e33bd97a7e
12 changed files with 645 additions and 566 deletions

View File

@ -1,6 +1,5 @@
- Incorrect Q1 pinout
- R7 should be 0 Ohm
- R14 should be 82 Ohm
- R19 should be 200 Ohm
- R20, R22, R25 should be ??? (TODO) Ohm
- X1 - 28MHz
- R5 should be 200
- R14 should be 0
- R19 should be 200
- do not install: R20, R21, R22, R23, R24, R25, C18, C19, Q1