uzix/zx-sizif-xxs
1
0
Fork 0
mirror of https://github.com/UzixLS/zx-sizif-xxs.git synced 2025-07-19 07:11:28 +03:00
Code Issues Projects Releases Wiki Activity

fix ps/2 sticking keys

Browse Source
This commit is contained in:
Eugene Lozovoy
2022-10-30 20:55:26 +03:00
parent b7b64506dc
commit cf2671b9ad
1 changed files with 17 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
fpga/rtl/ps2_rxtx.v
View File

@ -16,28 +16,21 @@ module ps2_rxtx#(
localparam CLKWAIT_US = 1;
localparam TOUT_US = 150;
localparam CLKWAIT_TICKS = int'(CLKWAIT_US*CLK_FREQ/1e6) + 1'b1;
localparam TOUT_US = 150; // must be greater than CLKWAIT_US
localparam TOUT_TICKS = int'(TOUT_US*CLK_FREQ/1e6) + 1'b1;
localparam TIMER_WIDTH = $clog2(TOUT_TICKS);
reg [TIMER_WIDTH-1:0] timer;
reg [$clog2(TOUT_TICKS)-1:0] timer;
reg ps2_freeze; // debounce
reg ps2_dat;
reg [1:0] ps2_clk;
wire ps2_clk_fall = ps2_freeze? 1'b0 : (ps2_clk[0] == 0 && ps2_clk[1] == 1'b1);
wire ps2_clk_fall = ps2_clk[0] == 0 && ps2_clk[1] == 1'b1;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
ps2_freeze <= 0;
ps2_dat <= 1'b1;
ps2_clk <= 2'b11;
end
else begin
if (timer == CLKWAIT_TICKS)
ps2_freeze <= 1'b0;
else if (ps2_clk_fall)
ps2_freeze <= 1'b1;
ps2_dat <= ps2_dat_in;
ps2_clk <= {ps2_clk[0], ps2_clk_in};
end
@ -59,21 +52,23 @@ always @(posedge clk or negedge rst_n) begin
dataout_valid <= 0;
dataout_error <= 0;
if (ps2_clk_fall) begin
timer <= 1'b1;
end
else if (timer != 0) begin
if (timer == CLKWAIT_TICKS && !ps2_clk) begin
if (bit_cnt == 4'd10) begin
bit_cnt <= 0;
if (rxbits[0] == 0 && ~rxbits[9] == ^rxbits[8:1] && ps2_dat == 1'b1)
dataout_valid <= 1'b1;
else
dataout_error <= 1'b1;
bit_cnt <= 0;
end
else begin
bit_cnt <= bit_cnt + 1'b1;
rxbits <= {ps2_dat, rxbits[9:1]};
bit_cnt <= bit_cnt + 1'b1;
end
timer <= 1'b1;
end
else if (timer != 0) begin
if (timer == TOUT_TICKS) begin
else if (timer == TOUT_TICKS) begin
dataout_error <= bit_cnt != 0;
bit_cnt <= 0;
end