From 770c086992b789df6cd7a82e47a590c1a0aea41b Mon Sep 17 00:00:00 2001 From: UzixLS Date: Sun, 2 May 2021 21:35:58 +0300 Subject: [PATCH] initial --- .gitattributes | 4 ++++ .gitignore | 44 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 .gitattributes create mode 100644 .gitignore diff --git a/.gitattributes b/.gitattributes new file mode 100644 index 0000000..39331ce --- /dev/null +++ b/.gitattributes @@ -0,0 +1,4 @@ +out/* linguist-vendored +*.kicad_pcb linguist-detectable=true +*.kicad_sch linguist-detectable=true +*.sch linguist-detectable=true diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..a1efce4 --- /dev/null +++ b/.gitignore @@ -0,0 +1,44 @@ +## Kicad +pcb/**/*-lib-table +pcb/**/*-cache +pcb/**/*-rescue.lib +pcb/**/*.sch-bak +pcb/**/*.kicad_pcb-bak +pcb/**/*.dcm +pcb/**/*.kicad_prl +pcb/**/*-backups/ +pcb/**/*.xml +pcb/**/out/ +pcb.*/ +pcb/rev*~*/ + +## Quartus +fpga/**/.qsys_edit/ +fpga/**/db/ +fpga/**/greybox_tmp/ +fpga/**/incremental_db/ +fpga/**/output/ +fpga/**/*.dpf +fpga/**/*.cdf +fpga/**/*.qws +fpga/**/*.srf +fpga/**/*.stp +fpga/**/simulation/ +fpga.*/ + +## Testbench +fpga_tb/ivl_vhdl_work/ +fpga_tb/work/ +fpga_tb/*.gtkw +fpga_tb/*.vcd +fpga_tb/*.bin +fpga_tb/*.mem +fpga_tb.*/ + +## Etc. +*.bak +*.*~ +*.sublime-* +rom/sizif-*.rom +rom_src/*.bin +rom_src.*/