From 664492d8f87c9ce5c1bddbb6bfd406c95b93e35c Mon Sep 17 00:00:00 2001 From: UzixLS Date: Wed, 2 Feb 2022 20:34:51 +0300 Subject: [PATCH] fix io contention --- fpga/rtl/cpucontrol.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/fpga/rtl/cpucontrol.sv b/fpga/rtl/cpucontrol.sv index 794f3fb..fb015b4 100755 --- a/fpga/rtl/cpucontrol.sv +++ b/fpga/rtl/cpucontrol.sv @@ -30,12 +30,12 @@ module cpucontrol( /* CONTENTION */ -wire iorq_contended = bus.iorq && (~bus.a[0] || (~bus.a[1] && ~bus.a[15] && bus.wr)) && (machine != MACHINE_S3); +wire iorq_contended = bus.iorq && (~bus.a_reg[0] || (~bus.a_reg[1] && ~bus.a[15] && bus.wr)) && (machine != MACHINE_S3); reg mreq_delayed, iorq_delayed; always @(posedge clkcpu) mreq_delayed <= bus.mreq; always @(posedge clkcpu) - iorq_delayed <= bus.iorq && ~bus.a[0]; + iorq_delayed <= bus.iorq && ~bus.a_reg[0]; wire contention_mem_page = (machine == MACHINE_S3)? rampage128[2] : rampage128[0]; wire contention_mem_addr = bus.a[14] & (~bus.a[15] | (bus.a[15] & contention_mem_page)); wire contention_mem = iorq_delayed == 1'b0 && mreq_delayed == 1'b0 && contention_mem_addr;