diff --git a/cpld/syn/rev_A1_2mb.qsf b/cpld/syn/rev_A1_2mb.qsf new file mode 100644 index 0000000..93f2b59 --- /dev/null +++ b/cpld/syn/rev_A1_2mb.qsf @@ -0,0 +1,171 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2013 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 64-Bit +# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version +# Date created = 12:04:27 October 04, 2020 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# zx_multisound_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY MAX3000A +set_global_assignment -name DEVICE "EPM3256ATC144-10" +set_global_assignment -name TOP_LEVEL_ENTITY zx_multisound +set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1" +set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:04:27 OCTOBER 04, 2020" +set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" +set_global_assignment -name SDC_FILE clocks.sdc +set_global_assignment -name VERILOG_FILE ../rtl/top.v +set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008 +set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF +set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005 +set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF +set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL" +set_global_assignment -name SAVE_DISK_SPACE OFF +set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF +set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF +set_location_assignment PIN_1 -to n_gram4 +set_location_assignment PIN_2 -to n_gram2 +set_location_assignment PIN_5 -to gma[17] +set_location_assignment PIN_6 -to gma[16] +set_location_assignment PIN_7 -to gma[18] +set_location_assignment PIN_8 -to n_gram1 +set_location_assignment PIN_9 -to n_gm1 +set_location_assignment PIN_10 -to n_grst +set_location_assignment PIN_11 -to ga[0] +set_location_assignment PIN_12 -to ga[1] +set_location_assignment PIN_14 -to ga[2] +set_location_assignment PIN_15 -to ga[3] +set_location_assignment PIN_16 -to ga[4] +set_location_assignment PIN_18 -to ga[5] +set_location_assignment PIN_19 -to ga[6] +set_location_assignment PIN_21 -to ga[7] +set_location_assignment PIN_22 -to ga[8] +set_location_assignment PIN_23 -to ga[9] +set_location_assignment PIN_25 -to ga[10] +set_location_assignment PIN_27 -to n_gwr +set_location_assignment PIN_28 -to n_grd +set_location_assignment PIN_29 -to n_giorq +set_location_assignment PIN_30 -to n_gmreq +set_location_assignment PIN_31 -to ga[11] +set_location_assignment PIN_32 -to ga[12] +set_location_assignment PIN_34 -to ga[13] +set_location_assignment PIN_35 -to ga[14] +set_location_assignment PIN_36 -to ga[15] +set_location_assignment PIN_37 -to gd[3] +set_location_assignment PIN_38 -to gd[5] +set_location_assignment PIN_39 -to gd[6] +set_location_assignment PIN_40 -to gd[2] +set_location_assignment PIN_41 -to gd[7] +set_location_assignment PIN_42 -to gd[4] +set_location_assignment PIN_43 -to gclk +set_location_assignment PIN_44 -to n_gint +set_location_assignment PIN_45 -to gd[0] +set_location_assignment PIN_46 -to gd[1] +set_location_assignment PIN_47 -to n_grom +set_location_assignment PIN_48 -to gma[15] +set_location_assignment PIN_49 -to cfg[0] +set_location_assignment PIN_53 -to cfg[1] +set_location_assignment PIN_54 -to cfg[2] +set_location_assignment PIN_55 -to cfg[3] +set_location_assignment PIN_56 -to cfg[4] +set_location_assignment PIN_60 -to dac3_out +set_location_assignment PIN_61 -to dac2_out +set_location_assignment PIN_62 -to dac1_out +set_location_assignment PIN_63 -to dac0_out +set_location_assignment PIN_69 -to ym_m +set_location_assignment PIN_70 -to fm1_ena +set_location_assignment PIN_74 -to aa0 +set_location_assignment PIN_75 -to n_ard +set_location_assignment PIN_78 -to n_awr +set_location_assignment PIN_79 -to n_ym1_cs +set_location_assignment PIN_80 -to n_ym2_cs +set_location_assignment PIN_81 -to n_rstout +set_location_assignment PIN_82 -to fm2_ena +set_location_assignment PIN_83 -to ad[0] +set_location_assignment PIN_84 -to ad[1] +set_location_assignment PIN_86 -to ad[2] +set_location_assignment PIN_87 -to ad[3] +set_location_assignment PIN_88 -to ad[4] +set_location_assignment PIN_90 -to ad[5] +set_location_assignment PIN_91 -to ad[6] +set_location_assignment PIN_92 -to ad[7] +set_location_assignment PIN_93 -to n_saa_cs +set_location_assignment PIN_96 -to saa_clk +set_location_assignment PIN_97 -to midi_clk +set_location_assignment PIN_98 -to a[14] +set_location_assignment PIN_99 -to a[15] +set_location_assignment PIN_100 -to a[12] +set_location_assignment PIN_101 -to a[13] +set_location_assignment PIN_102 -to d[7] +set_location_assignment PIN_103 -to d[0] +set_location_assignment PIN_106 -to d[1] +set_location_assignment PIN_107 -to d[2] +set_location_assignment PIN_108 -to n_dos +set_location_assignment PIN_109 -to a[0] +set_location_assignment PIN_110 -to d[6] +set_location_assignment PIN_111 -to a[1] +set_location_assignment PIN_112 -to d[5] +set_location_assignment PIN_113 -to a[2] +set_location_assignment PIN_116 -to d[3] +set_location_assignment PIN_117 -to a[3] +set_location_assignment PIN_118 -to d[4] +set_location_assignment PIN_119 -to n_iorqge +set_location_assignment PIN_120 -to n_mreq +set_location_assignment PIN_121 -to n_iorq +set_location_assignment PIN_122 -to n_rd +set_location_assignment PIN_125 -to clkx +set_location_assignment PIN_126 -to n_wr +set_location_assignment PIN_127 -to rst_n +set_location_assignment PIN_128 -to clk32 +set_location_assignment PIN_131 -to n_iodos +set_location_assignment PIN_132 -to n_wait +set_location_assignment PIN_133 -to a[7] +set_location_assignment PIN_134 -to a[6] +set_location_assignment PIN_136 -to a[5] +set_location_assignment PIN_137 -to n_m1 +set_location_assignment PIN_138 -to a[4] +set_location_assignment PIN_139 -to a[8] +set_location_assignment PIN_140 -to a[9] +set_location_assignment PIN_141 -to a[10] +set_location_assignment PIN_142 -to a[11] +set_location_assignment PIN_143 -to n_gram3 +set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE BALANCED +set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF +set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF +set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON +set_global_assignment -name FITTER_EFFORT "STANDARD FIT" +set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED" + +set_global_assignment -name VERILOG_MACRO "GS_RAM_2MB=" diff --git a/out/cpld.rev.A1.2mb.pof b/out/cpld.rev.A1.2mb.pof new file mode 100644 index 0000000..3ca59f0 Binary files /dev/null and b/out/cpld.rev.A1.2mb.pof differ