wip pcb rev.A

This commit is contained in:
UzixLS
2021-12-14 20:31:35 +03:00
parent 617c454264
commit 82a373c9d0
6 changed files with 7982 additions and 4017 deletions

File diff suppressed because it is too large Load Diff

View File

@ -48,7 +48,13 @@
"min_clearance": 0.254
}
},
"diff_pair_dimensions": [],
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"version": 2
@ -103,14 +109,26 @@
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"min_track_width": 0.15,
"min_via_annular_width": 0.15,
"min_via_diameter": 0.44999999999999996,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
},
"track_widths": [],
"via_dimensions": [],
"track_widths": [
0.0,
0.2,
0.45,
0.9,
1.4,
2.0
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
@ -346,9 +364,9 @@
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"track_width": 0.2,
"via_diameter": 0.455,
"via_drill": 0.3,
"wire_width": 6.0
}
],

File diff suppressed because it is too large Load Diff