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README.md
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## What is this?
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This is project of reverse engineering Ncompunting L230 PCB (rev 1.4).
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[](images/top.jpg)
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## What is there?
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* *cpld/* - template for CPLD firmware for Quartus
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* *fpga/* - template for FPGA firmware for Quartus
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* *pcb/*- simplified schematic in Kicad format
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* *doc/*- some datasheets for used chips
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## Main chips
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* FPGA: EP1C12Q240C8N
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* CPLD: EPM3128ATC100-10N
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* Flash: AT45DB041B
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* SDRAM: IS42S32400D-7TL
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* Ethernet: RTL8201CL
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* Audio input: PCM1808
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* Audio output amplifier: LM358
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## Programming
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Programming header J1 have this pinout:
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| # | Pin | Function |
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| - | - | - |
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| 1 | MAX-62 | TCK |
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| 2 | MAX-73 | TDO |
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| 3 | MAX-15 | TMS |
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| 4 | - | GND |
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| 5 | MAX-4 | TDI |
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To program FPGA on-the-fly you need:
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1. Cut MAX-73 to J1-2 trace;
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2. Connect MAX-73 to CY-155;
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3. Connect CY-147 to J1-1;
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4. Connect CY-149 to J1-2;
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5. Connect CY-148 to J1-3.
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