mirror of
https://github.com/UzixLS/TSConf_MiST.git
synced 2025-07-18 14:51:25 +03:00
432 lines
9.4 KiB
Systemverilog
432 lines
9.4 KiB
Systemverilog
//============================================================================
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// TSConf for MiSTer
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//
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// Port to MiSTer
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// Copyright (C) 2017-2019 Sorgelig
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//
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// This program is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 of the License, or (at your option)
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// any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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// more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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//============================================================================
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module TSConf_top
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(
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input CLOCK_27,
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output LED,
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output [VGA_BITS-1:0] VGA_R,
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output [VGA_BITS-1:0] VGA_G,
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output [VGA_BITS-1:0] VGA_B,
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output VGA_HS,
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output VGA_VS,
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input SPI_SCK,
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inout SPI_DO,
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input SPI_DI,
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input SPI_SS2, // data_io
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input SPI_SS3, // OSD
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input CONF_DATA0, // SPI_SS for user_io
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input SPI_SS4,
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output [12:0] SDRAM_A,
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inout [15:0] SDRAM_DQ,
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output SDRAM_DQML,
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output SDRAM_DQMH,
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output SDRAM_nWE,
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output SDRAM_nCAS,
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output SDRAM_nRAS,
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output SDRAM_nCS,
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output [1:0] SDRAM_BA,
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output SDRAM_CLK,
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output SDRAM_CKE,
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output AUDIO_L,
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output AUDIO_R,
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input UART_RX,
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output UART_TX
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);
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localparam VGA_BITS = 6;
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localparam bit BIG_OSD = 1;
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assign LED = ~ioctl_download & ~ioctl_upload & UART_TX & UART_RX;
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assign UART_TX = 1'b1;
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`include "build_id.v"
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localparam CONF_STR = {
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"TSConf;;",
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"O78,Joystick 1,Kempston,Sinclair 1,Sinclair 2,Cursor;",
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"O9A,Joystick 2,Kempston,Sinclair 1,Sinclair 2,Cursor;",
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"O12,Scandoubler Fx,None,CRT 25%,CRT 50%,CRT 75%;",
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"O4,Vsync,49 Hz,60 Hz;",
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"O5,VDAC1,ON,OFF;",
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"O6,CPU Type,CMOS,NMOS;",
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"-;",
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"R256,Save NVRAM settings;",
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"T0,Reset;",
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"V,v",`BUILD_DATE
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};
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wire st_reset = status[0];
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wire [1:0] st_joystick1 = status[8:7];
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wire [1:0] st_joystick2 = status[10:9];
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wire [1:0] st_scanlines = status[2:1];
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wire st_60hz = ~status[4];
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wire st_vdac = ~status[5];
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wire st_out0 = ~status[6];
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//////////////////// CLOCKS ///////////////////
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wire clk_sys;
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wire clk_ram;
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pll pll
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(
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.inclk0(CLOCK_27),
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.c0(clk_ram),
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.c1(clk_sys),
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.locked()
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);
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altclkctrl
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#(
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.number_of_clocks(1),
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.clock_type("External Clock Output"),
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.ena_register_mode("none"),
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.intended_device_family("Cyclone III")
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)
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altclkctrl
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(
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.inclk(clk_ram),
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.outclk(SDRAM_CLK)
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);
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reg ce_28m;
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always @(negedge clk_sys) begin
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reg [1:0] div;
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div <= div + 1'd1;
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if(div == 2) div <= 0;
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ce_28m <= !div;
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end
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////////////////// MIST ARM I/O ///////////////////
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wire [31:0] joystick_0;
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wire [31:0] joystick_1;
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wire [1:0] buttons;
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wire [1:0] switches;
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wire scandoubler_disable;
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wire ypbpr;
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wire no_csync;
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wire [63:0] status;
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wire [63:0] rtc;
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wire sd_busy_mmc;
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wire sd_rd_mmc;
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wire sd_wr_mmc;
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wire [31:0] sd_lba_mmc;
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wire [7:0] sd_buff_din_mmc;
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wire [31:0] sd_lba = sd_lba_mmc;
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wire [1:0] sd_rd = { 1'b0, sd_rd_mmc };
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wire [1:0] sd_wr = { 1'b0, sd_wr_mmc };
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wire sd_ack;
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wire [8:0] sd_buff_addr;
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wire [7:0] sd_buff_dout;
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wire [7:0] sd_buff_din = sd_buff_din_mmc;
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wire sd_buff_wr;
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wire [1:0] img_mounted;
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wire [63:0] img_size;
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wire sd_ack_conf;
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wire sd_conf;
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wire sd_sdhc;
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wire key_strobe;
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wire key_pressed;
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wire key_extended;
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wire [7:0] key_code;
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wire [8:0] mouse_x;
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wire [8:0] mouse_y;
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wire [7:0] mouse_flags;
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wire mouse_strobe;
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wire [24:0] ps2_mouse = { mouse_strobe_level, mouse_y[7:0], mouse_x[7:0], mouse_flags };
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reg mouse_strobe_level;
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always @(posedge clk_sys) if (mouse_strobe) mouse_strobe_level <= ~mouse_strobe_level;
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user_io #(.STRLEN($size(CONF_STR)>>3), .SD_IMAGES(2), .FEATURES(32'h0 | (BIG_OSD << 13))) user_io
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(
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.clk_sys(clk_sys),
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.clk_sd(clk_sys),
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.conf_str(CONF_STR),
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.SPI_CLK(SPI_SCK),
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.SPI_SS_IO(CONF_DATA0),
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.SPI_MOSI(SPI_DI),
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.SPI_MISO(SPI_DO),
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.img_mounted(img_mounted),
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.img_size(img_size),
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.sd_conf(sd_conf),
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.sd_ack_conf(sd_ack_conf),
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.sd_sdhc(sd_sdhc),
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.sd_lba(sd_lba),
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.sd_rd(sd_rd),
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.sd_wr(sd_wr),
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.sd_ack(sd_ack),
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.sd_buff_addr(sd_buff_addr),
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.sd_din(sd_buff_din),
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.sd_dout(sd_buff_dout),
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.sd_dout_strobe(sd_buff_wr),
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.key_strobe(key_strobe),
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.key_code(key_code),
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.key_pressed(key_pressed),
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.key_extended(key_extended),
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.mouse_x(mouse_x),
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.mouse_y(mouse_y),
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.mouse_flags(mouse_flags),
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.mouse_strobe(mouse_strobe),
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.joystick_0(joystick_0),
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.joystick_1(joystick_1),
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.buttons(buttons),
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.status(status),
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.scandoubler_disable(scandoubler_disable),
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.ypbpr(ypbpr),
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.no_csync(no_csync),
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.rtc(rtc)
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);
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wire ioctl_wr;
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wire [24:0] ioctl_addr;
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wire [7:0] ioctl_dout;
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wire [7:0] ioctl_din;
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wire ioctl_download;
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wire ioctl_upload;
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wire [5:0] ioctl_index;
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wire [1:0] ioctl_ext_index;
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data_io data_io
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(
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.clk_sys(clk_sys),
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.SPI_SCK(SPI_SCK),
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.SPI_SS2(SPI_SS2),
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.SPI_DI(SPI_DI),
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.SPI_DO(SPI_DO),
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.clkref_n(1'b0),
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.ioctl_wr(ioctl_wr),
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.ioctl_addr(ioctl_addr),
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.ioctl_dout(ioctl_dout),
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.ioctl_din(ioctl_din),
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.ioctl_download(ioctl_download),
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.ioctl_upload(ioctl_upload),
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.ioctl_index({ioctl_ext_index, ioctl_index})
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);
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reg init_reset = 1;
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reg old_download;
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always @(posedge clk_sys) begin
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old_download <= ioctl_download;
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if(ioctl_download) init_reset <= 1'b1;
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if(old_download & ~ioctl_download) init_reset <= 0;
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end
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////////////////// SD ///////////////////
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wire sdss;
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wire sdclk;
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wire sdmiso;
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wire sdmosi;
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sd_card sd_card
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(
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.clk_sys(clk_sys),
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.img_mounted(img_mounted[0]), //first slot for SD-card emulation
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.img_size(img_size),
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.sd_busy(sd_busy_mmc),
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.sd_rd(sd_rd_mmc),
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.sd_wr(sd_wr_mmc),
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.sd_lba(sd_lba_mmc),
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.sd_buff_din(sd_buff_din_mmc),
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.sd_buff_dout(sd_buff_dout),
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.sd_buff_wr(sd_buff_wr),
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.sd_buff_addr(sd_buff_addr),
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.sd_ack(sd_ack),
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.sd_ack_conf(sd_ack_conf),
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.allow_sdhc(1),
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.sd_sdhc(sd_sdhc),
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.sd_conf(sd_conf),
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.sd_cs(sdss),
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.sd_sck(sdclk),
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.sd_sdi(sdmosi),
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.sd_sdo(sdmiso)
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);
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//////////////////// MAIN //////////////////////
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wire [7:0] R,G,B;
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wire VS, HS;
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wire [15:0] SOUND_L;
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wire [15:0] SOUND_R;
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tsconf tsconf
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(
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.clk(clk_sys),
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.ce(ce_28m),
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.SDRAM_DQ(SDRAM_DQ),
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.SDRAM_A(SDRAM_A),
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.SDRAM_BA(SDRAM_BA),
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.SDRAM_DQML(SDRAM_DQML),
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.SDRAM_DQMH(SDRAM_DQMH),
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.SDRAM_nWE(SDRAM_nWE),
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.SDRAM_nCAS(SDRAM_nCAS),
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.SDRAM_nRAS(SDRAM_nRAS),
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.SDRAM_CKE(SDRAM_CKE),
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.SDRAM_nCS(SDRAM_nCS),
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// .SDRAM_CLK(SDRAM_CLK),
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.VRED(R),
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.VGRN(G),
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.VBLU(B),
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.VHSYNC(HS),
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.VVSYNC(VS),
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.SD_SO(sdmiso),
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.SD_SI(sdmosi),
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.SD_CLK(sdclk),
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.SD_CS_N(sdss),
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.SOUND_L(SOUND_L),
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.SOUND_R(SOUND_R),
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.COLD_RESET(init_reset | st_reset),
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.WARM_RESET(buttons[1]),
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.RTC(rtc),
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.TAPE_IN(UART_RX),
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.CFG_OUT0(st_out0),
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.CFG_60HZ(st_60hz),
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.CFG_SCANDOUBLER(1'b0),
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.CFG_VDAC(st_vdac),
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.CFG_JOYSTICK1(st_joystick1),
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.CFG_JOYSTICK2(st_joystick2),
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.PS2_KEY({key_strobe,key_pressed,key_extended,key_code}),
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.PS2_MOUSE(ps2_mouse),
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.JOYSTICK1({joystick_0[9:8], joystick_0[5:0]}),
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.JOYSTICK2({joystick_1[9:8], joystick_1[5:0]}),
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.loader_act(ioctl_download),
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.loader_addr(ioctl_addr[15:0]),
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.loader_do(ioctl_dout),
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.loader_di(ioctl_din),
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.loader_wr(ioctl_wr),
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.loader_cs_rom_main(ioctl_index == 6'h0),
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.loader_cs_rom_gs(ioctl_index == 6'h1),
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.loader_cs_cmos(ioctl_index == 6'h3f)
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);
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reg VSync, HSync;
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always @(posedge clk_sys) begin
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HSync <= HS;
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if(~HSync & HS) VSync <= VS;
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end
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////////////////// VIDEO ///////////////////
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mist_video #(.COLOR_DEPTH(8), .SD_HCNT_WIDTH(11), .OUT_COLOR_DEPTH(VGA_BITS), .BIG_OSD(BIG_OSD)) mist_video (
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.clk_sys ( clk_sys ),
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// OSD SPI interface
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.SPI_SCK ( SPI_SCK ),
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.SPI_SS3 ( SPI_SS3 ),
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.SPI_DI ( SPI_DI ),
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// scanlines (00-none 01-25% 10-50% 11-75%)
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.scanlines ( st_scanlines ),
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// non-scandoubled pixel clock divider 0 - clk_sys/4, 1 - clk_sys/2
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.ce_divider ( 3'd2 ),
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// 0 = HVSync 31KHz, 1 = CSync 15KHz
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.scandoubler_disable ( scandoubler_disable ),
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// disable csync without scandoubler
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.no_csync ( no_csync ),
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// YPbPr always uses composite sync
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.ypbpr ( ypbpr ),
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// Rotate OSD [0] - rotate [1] - left or right
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.rotate ( 2'b00 ),
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// composite-like blending
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.blend ( 1'b0 ),
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// video in
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.R ( R ),
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.G ( G ),
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.B ( B ),
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.HSync ( HSync ),
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.VSync ( VSync ),
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// MiST video output signals
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.VGA_R ( VGA_R ),
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.VGA_G ( VGA_G ),
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.VGA_B ( VGA_B ),
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.VGA_VS ( VGA_VS ),
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.VGA_HS ( VGA_HS )
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);
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////////////////// SOUND ///////////////////
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wire dac_l, dac_r;
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hybrid_pwm_sd_2ndorder #(.signalwidth(16)) dac (
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.clk(clk_sys & ce_28m),
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.reset_n(~init_reset),
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.d_l({~SOUND_L[15], SOUND_L[14:0]}),
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.q_l(dac_l),
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.d_r({~SOUND_R[15], SOUND_R[14:0]}),
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.q_r(dac_r)
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);
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reg [23:0] mute_cnt = 0;
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always @(posedge clk_sys) begin
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if (init_reset)
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mute_cnt <= 1;
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else if (mute_cnt && ce_28m)
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mute_cnt <= mute_cnt + 1'b1;
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end
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assign AUDIO_L = mute_cnt? 1'bZ : dac_l;
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assign AUDIO_R = mute_cnt? 1'bZ : dac_r;
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endmodule
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