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111 lines
3.2 KiB
Verilog
111 lines
3.2 KiB
Verilog
/* This file is part of JT12.
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JT12 is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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JT12 is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with JT12. If not, see <http://www.gnu.org/licenses/>.
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Author: Jose Tejada Gomez. Twitter: @topapate
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Version: 1.0
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Date: 29-10-2018
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*/
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module jt12_eg_step(
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input attack,
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input [ 4:0] base_rate,
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input [ 4:0] keycode,
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input [14:0] eg_cnt,
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input cnt_in,
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input [ 1:0] ks,
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output cnt_lsb,
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output reg step,
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output reg [5:0] rate,
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output reg sum_up
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);
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reg [6:0] pre_rate;
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always @(*) begin : pre_rate_calc
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if( base_rate == 5'd0 )
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pre_rate = 7'd0;
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else
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case( ks )
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2'd3: pre_rate = { base_rate, 1'b0 } + { 1'b0, keycode };
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2'd2: pre_rate = { base_rate, 1'b0 } + { 2'b0, keycode[4:1] };
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2'd1: pre_rate = { base_rate, 1'b0 } + { 3'b0, keycode[4:2] };
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2'd0: pre_rate = { base_rate, 1'b0 } + { 4'b0, keycode[4:3] };
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endcase
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end
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always @(*)
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rate = pre_rate[6] ? 6'd63 : pre_rate[5:0];
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reg [2:0] cnt;
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reg [4:0] mux_sel;
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always @(*) begin
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mux_sel = attack ? (rate[5:2]+4'd1): {1'b0,rate[5:2]};
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end // always @(*)
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always @(*)
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case( mux_sel )
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5'h0: cnt = eg_cnt[14:12];
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5'h1: cnt = eg_cnt[13:11];
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5'h2: cnt = eg_cnt[12:10];
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5'h3: cnt = eg_cnt[11: 9];
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5'h4: cnt = eg_cnt[10: 8];
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5'h5: cnt = eg_cnt[ 9: 7];
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5'h6: cnt = eg_cnt[ 8: 6];
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5'h7: cnt = eg_cnt[ 7: 5];
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5'h8: cnt = eg_cnt[ 6: 4];
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5'h9: cnt = eg_cnt[ 5: 3];
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5'ha: cnt = eg_cnt[ 4: 2];
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5'hb: cnt = eg_cnt[ 3: 1];
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default: cnt = eg_cnt[ 2: 0];
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endcase
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////////////////////////////////
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reg [7:0] step_idx;
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always @(*) begin : rate_step
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if( rate[5:4]==2'b11 ) begin // 0 means 1x, 1 means 2x
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if( rate[5:2]==4'hf && attack)
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step_idx = 8'b11111111; // Maximum attack speed, rates 60&61
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else
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case( rate[1:0] )
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2'd0: step_idx = 8'b00000000;
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2'd1: step_idx = 8'b10001000; // 2
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2'd2: step_idx = 8'b10101010; // 4
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2'd3: step_idx = 8'b11101110; // 6
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endcase
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end
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else begin
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if( rate[5:2]==4'd0 && !attack)
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step_idx = 8'b11111110; // limit slowest decay rate
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else
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case( rate[1:0] )
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2'd0: step_idx = 8'b10101010; // 4
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2'd1: step_idx = 8'b11101010; // 5
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2'd2: step_idx = 8'b11101110; // 6
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2'd3: step_idx = 8'b11111110; // 7
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endcase
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end
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// a rate of zero keeps the level still
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step = rate[5:1]==5'd0 ? 1'b0 : step_idx[ cnt ];
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end
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assign cnt_lsb = cnt[0];
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always @(*) begin
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sum_up = cnt[0] != cnt_in;
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end
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endmodule // eg_step
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