mirror of
https://github.com/UzixLS/TSConf_MiST.git
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72 lines
1.7 KiB
Plaintext
72 lines
1.7 KiB
Plaintext
-- Copyright (C) 2017 Intel Corporation. All rights reserved.
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-- Your use of Intel Corporation's design tools, logic functions
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-- and other software and tools, and its AMPP partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Intel Program License
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-- Subscription Agreement, the Intel Quartus Prime License Agreement,
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-- the Intel MegaCore Function License Agreement, or other
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-- applicable license agreement, including, without limitation,
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-- that your use is for the sole purpose of programming logic
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-- devices manufactured by Intel and sold by Intel or its
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-- authorized distributors. Please refer to the applicable
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-- agreement for further details.
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-- Quartus Prime generated Memory Initialization File (.mif)
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WIDTH=8;
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DEPTH=256;
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ADDRESS_RADIX=HEX;
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DATA_RADIX=HEX;
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CONTENT BEGIN
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[000..010] : 00;
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011 : AA;
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[012..0B0] : 00;
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0B1 : 01;
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0B2 : 00;
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0B3 : 01;
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0B4 : 03;
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[0B5..0B7] : 00;
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0B8 : 01;
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[0B9..0BA] : 00;
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0BB : 02;
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[0BC..0CD] : FF;
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[0CE..0CF] : 00;
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0D0 : 42;
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0D1 : 08;
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0D2 : 84;
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0D3 : 10;
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0D4 : C6;
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0D5 : 18;
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0D6 : 08;
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0D7 : 21;
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0D8 : 4A;
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0D9 : 29;
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0DA : 8C;
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0DB : 31;
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0DC : CE;
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0DD : 39;
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0DE : 21;
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0DF : 04;
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0E0 : 63;
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0E1 : 0C;
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0E2 : A5;
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0E3 : 14;
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0E4 : E7;
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0E5 : 1C;
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0E6 : 29;
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0E7 : 25;
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0E8 : 6B;
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0E9 : 2D;
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0EA : AD;
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0EB : 35;
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0EC : EF;
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0ED : 3D;
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0EE : 6B;
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0EF : A2;
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[0F0..0FF] : 00;
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END;
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