diff --git a/TSConf.sv b/TSConf.sv
index a5dd447..3129636 100644
--- a/TSConf.sv
+++ b/TSConf.sv
@@ -115,6 +115,7 @@ localparam CONF_STR = {
 	"O34,Stereo mix,None,25%,50%,100%;",
 	"OST,General Sound,512KB,1MB,2MB;",
 	"-;",
+	"OU,CPU Type,NMOS,CMOS;",
 	"O67,CPU Speed,3.5MHz,7MHz,14MHz;",
 	"O8,CPU Cache,On,Off;",
 	"O9A,#7FFD span,128K,128K Auto,1024K,512K;",
@@ -294,6 +295,7 @@ tsconf tsconf
 	.WARM_RESET(buttons[1]),
 	.RESET_OUT(reset),
 	.RTC(RTC),
+	.OUT0(status[30]),
 
 	.CMOSCfg(CMOSCfg),
 
diff --git a/src/t80/T80.vhd b/src/t80/T80.vhd
index e6db89f..e1302e0 100644
--- a/src/t80/T80.vhd
+++ b/src/t80/T80.vhd
@@ -84,7 +84,7 @@ use work.T80_Pack.all;
 entity T80 is
 	generic(
 		Mode   : integer := 0;  -- 0 => Z80, 1 => Fast Z80, 2 => 8080, 3 => GB
-		IOWait : integer := 0;  -- 0 => Single cycle I/O, 1 => Std I/O cycle
+		IOWait : integer := 0;  -- 0 => Single cycle I/O, 1 => Std I/O cycle
 		Flag_C : integer := 0;
 		Flag_N : integer := 1;
 		Flag_P : integer := 2;
@@ -118,6 +118,7 @@ entity T80 is
 		IntCycle_n : out std_logic;
 		IntE       : out std_logic;
 		Stop       : out std_logic;
+		out0       : in  std_logic := '0';  -- 0 => OUT(C),0, 1 => OUT(C),255
 		REG	     : out std_logic_vector(207 downto 0) -- IY, HL', DE', BC', IX, HL, DE, BC, PC, SP, R, I, F', A', F, A
 	);
 end T80;
@@ -971,7 +972,11 @@ begin
 			when "1101" =>
 				BusB <= std_logic_vector(PC(15 downto 8));
 			when "1110" =>
-				BusB <= "00000000";
+				if IR = x"71" and out0 = '1' then
+					BusB <= "11111111";
+				else
+					BusB <= "00000000";
+				end if;
 			when others =>
 				BusB <= "--------";
 			end case;
diff --git a/src/t80/T80_Pack.vhd b/src/t80/T80_Pack.vhd
index 7c73e4a..1b7f522 100644
--- a/src/t80/T80_Pack.vhd
+++ b/src/t80/T80_Pack.vhd
@@ -106,6 +106,7 @@ package T80_Pack is
 		TS              : out std_logic_vector(2 downto 0);
 		IntCycle_n      : out std_logic;
 		IntE            : out std_logic;
+		out0            : in  std_logic := '0';  -- 0 => OUT(C),0, 1 => OUT(C),255
 		Stop            : out std_logic;
 		REG             : out std_logic_vector(207 downto 0) -- IY, HL', DE', BC', IX, HL, DE, BC, PC, SP, R, I, F', A', F, A
 	);
diff --git a/src/t80/T80s.vhd b/src/t80/T80s.vhd
index 1f45aa0..c30031c 100644
--- a/src/t80/T80s.vhd
+++ b/src/t80/T80s.vhd
@@ -92,6 +92,7 @@ entity T80s is
 		RFSH_n		: out std_logic;
 		HALT_n		: out std_logic;
 		BUSAK_n		: out std_logic;
+		OUT0        : in  std_logic := '0';  -- 0 => OUT(C),0, 1 => OUT(C),255
 		A				: out std_logic_vector(15 downto 0);
 		DI				: in std_logic_vector(7 downto 0);
 		DO				: out std_logic_vector(7 downto 0)
@@ -134,7 +135,8 @@ begin
 			DI => DI_Reg,
 			DO => DO,
 			MC => MCycle,
-			TS => TState,
+			TS => TState,
+			OUT0 => OUT0,
 			IntCycle_n => IntCycle_n
 		);
 
diff --git a/src/tsconf.v b/src/tsconf.v
index b989fd2..fc0c7dd 100644
--- a/src/tsconf.v
+++ b/src/tsconf.v
@@ -55,61 +55,62 @@
 
 module tsconf
 (
-   // Clocks
-   input         clk_84mhz,
-   input         clk_28mhz,
+	// Clocks
+	input         clk_84mhz,
+	input         clk_28mhz,
 
-   // SDRAM (32MB 16x16bit)
-   inout  [15:0] SDRAM_DQ,
-   output [12:0] SDRAM_A,
-   output  [1:0] SDRAM_BA,
-   output        SDRAM_DQML,
-   output        SDRAM_DQMH,
-   output        SDRAM_WE_N,
-   output        SDRAM_CAS_N,
-   output        SDRAM_RAS_N,
-   output        SDRAM_CKE,
-   output        SDRAM_CS_N,
+	// SDRAM (32MB 16x16bit)
+	inout  [15:0] SDRAM_DQ,
+	output [12:0] SDRAM_A,
+	output  [1:0] SDRAM_BA,
+	output        SDRAM_DQML,
+	output        SDRAM_DQMH,
+	output        SDRAM_WE_N,
+	output        SDRAM_CAS_N,
+	output        SDRAM_RAS_N,
+	output        SDRAM_CKE,
+	output        SDRAM_CS_N,
 
-   // VGA
-   output  [7:0] VGA_R,
-   output  [7:0] VGA_G,
-   output  [7:0] VGA_B,
-   output        VGA_HS,
-   output        VGA_VS,
-   output        VGA_HBLANK,
-   output        VGA_VBLANK,
-   output        VGA_CEPIX,
+	// VGA
+	output  [7:0] VGA_R,
+	output  [7:0] VGA_G,
+	output  [7:0] VGA_B,
+	output        VGA_HS,
+	output        VGA_VS,
+	output        VGA_HBLANK,
+	output        VGA_VBLANK,
+	output        VGA_CEPIX,
 
-   // SD/MMC Memory Card
-   input         SD_SO,
-   output        SD_SI,
-   output        SD_CLK,
-   output        SD_CS_N,
+	// SD/MMC Memory Card
+	input         SD_SO,
+	output        SD_SI,
+	output        SD_CLK,
+	output        SD_CS_N,
 
-   // General Sound
-   output [20:0] GS_ADDR,
-   output  [7:0] GS_DI,
-   input   [7:0] GS_DO,
-   output        GS_RD,
-   output        GS_WR,
-   input         GS_WAIT,
+	// General Sound
+	output [20:0] GS_ADDR,
+	output  [7:0] GS_DI,
+	input   [7:0] GS_DO,
+	output        GS_RD,
+	output        GS_WR,
+	input         GS_WAIT,
 
-   // Audio
-   output [15:0] SOUND_L,
-   output [15:0] SOUND_R,
+	// Audio
+	output [15:0] SOUND_L,
+	output [15:0] SOUND_R,
 
-   // External I/O
-   input         COLD_RESET,
-   input         WARM_RESET,
-   output        RESET_OUT,
-   input  [64:0] RTC,
-   input  [31:0] CMOSCfg,
+	// Misc. I/O
+	input         COLD_RESET,
+	input         WARM_RESET,
+	output        RESET_OUT,
+	input  [64:0] RTC,
+	input  [31:0] CMOSCfg,
+	input         OUT0,
 
-   // PS/2 Keyboard
-   input  [10:0] PS2_KEY,
-   input  [24:0] PS2_MOUSE,
-   input   [5:0] joystick,
+	// PS/2 Keyboard
+	input  [10:0] PS2_KEY,
+	input  [24:0] PS2_MOUSE,
+	input   [5:0] joystick,
 
 	input  [15:0] loader_addr,
 	input   [7:0] loader_data,
@@ -340,6 +341,7 @@ T80s CPU
 	.RD_n(cpu_rd_n),
 	.WR_n(cpu_wr_n),
 	.RFSH_n(cpu_rfsh_n),
+	.OUT0(OUT0),
 	.A(cpu_a_bus),
 	.DI(cpu_di_bus),
 	.DO(cpu_do_bus)