uzix/TSConf_MiST
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timings-related fixes

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This commit is contained in:
Eugene Lozovoy
2024-09-10 11:19:14 +03:00
parent b575eed412
commit a335568fb0
7 changed files with 572 additions and 535 deletions
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4
rtl/tsconf.v
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@ -888,8 +888,10 @@ compressor compressor
//-----------------------------------------------------------------------------
// Global
//-----------------------------------------------------------------------------
wire reset = COLD_RESET | WARM_RESET | key_reset;
reg reset;
assign RESET_OUT = reset;
always @(posedge clk)
reset <= COLD_RESET | WARM_RESET | key_reset;
// CPU interface
assign cpu_di_bus =