Update sys. Persistent mounted image.

This commit is contained in:
Sorgelig
2022-02-16 23:30:41 +07:00
parent 5acd86358f
commit 90ec4909bc
17 changed files with 1697 additions and 1012 deletions

View File

@ -28,21 +28,29 @@ module video_freak
input [11:0] ARX,
input [11:0] ARY,
input [11:0] CROP_SIZE,
input [4:0] CROP_OFF,
input [1:0] SCALE
input [4:0] CROP_OFF, // -16...+15
input [2:0] SCALE //0 - normal, 1 - V-integer, 2 - HV-Integer-, 3 - HV-Integer+, 4 - HV-Integer
);
reg mul_start;
wire mul_run;
reg [11:0] mul_arg1, mul_arg2;
wire [23:0] mul_res;
sys_umul #(12,12) mul(CLK_VIDEO,mul_start,mul_run, mul_arg1,mul_arg2,mul_res);
reg vde;
reg [11:0] arxo,aryo;
reg [11:0] vsize;
reg [11:0] hsize;
always @(posedge CLK_VIDEO) begin
reg old_de, old_vs,vcalc,ovde;
reg old_de, old_vs,ovde;
reg [11:0] vtot,vcpt,vcrop,voff;
reg [11:0] hcpt;
reg [11:0] vadj;
reg [23:0] ARXG,ARYG,arx,ary;
reg [23:0] ARXG,ARYG;
reg [11:0] arx,ary;
reg [1:0] vcalc;
if (CE_PIXEL) begin
old_de <= VGA_DE_IN;
@ -51,7 +59,7 @@ always @(posedge CLK_VIDEO) begin
vcpt <= 0;
vtot <= vcpt;
vcalc <= 1;
vcrop <= ((CROP_SIZE >= vcpt) || !CROP_SIZE) ? 12'd0 : CROP_SIZE;
vcrop <= (CROP_SIZE >= vcpt) ? 12'd0 : CROP_SIZE;
end
if (VGA_DE_IN) hcpt <= hcpt + 1'd1;
@ -65,17 +73,36 @@ always @(posedge CLK_VIDEO) begin
arx <= ARX;
ary <= ARY;
vsize <= vcrop;
vsize <= vcrop ? vcrop : vtot;
mul_start <= 0;
if(!vcrop || !ary || !arx) begin
arxo <= arx[11:0];
aryo <= ary[11:0];
vsize <= vtot;
arxo <= arx;
aryo <= ary;
end
else if (vcalc) begin
ARXG <= arx * vtot;
ARYG <= ary * vcrop;
vcalc <= 0;
if(~mul_start & ~mul_run) begin
vcalc <= vcalc + 1'd1;
case(vcalc)
1: begin
mul_arg1 <= arx;
mul_arg2 <= vtot;
mul_start <= 1;
end
2: begin
ARXG <= mul_res;
mul_arg1 <= ary;
mul_arg2 <= vcrop;
mul_start <= 1;
end
3: begin
ARYG <= mul_res;
end
endcase
end
end
else if (ARXG[23] | ARYG[23]) begin
arxo <= ARXG[23:12];
@ -99,11 +126,11 @@ video_scale_int scale
.CLK_VIDEO(CLK_VIDEO),
.HDMI_WIDTH(HDMI_WIDTH),
.HDMI_HEIGHT(HDMI_HEIGHT),
.SCALE(SCALE),
.hsize(hsize),
.vsize(vsize),
.arx_i(arxo),
.ary_i(aryo),
.scale(SCALE),
.arx_o(VIDEO_ARX),
.ary_o(VIDEO_ARY)
);
@ -113,18 +140,18 @@ endmodule
module video_scale_int
(
input CLK_VIDEO,
input CLK_VIDEO,
input [11:0] HDMI_WIDTH,
input [11:0] HDMI_HEIGHT,
input [11:0] HDMI_WIDTH,
input [11:0] HDMI_HEIGHT,
input [11:0] hsize,
input [11:0] vsize,
input [2:0] SCALE,
input [11:0] arx_i,
input [11:0] ary_i,
input [11:0] hsize,
input [11:0] vsize,
input [1:0] scale,
input [11:0] arx_i,
input [11:0] ary_i,
output reg [12:0] arx_o,
output reg [12:0] ary_o
@ -144,16 +171,17 @@ wire [23:0] mul_res;
sys_umul #(12,12) mul(CLK_VIDEO,mul_start,mul_run, mul_arg1,mul_arg2,mul_res);
wire [11:0] wideres = mul_res[11:0] + hsize;
reg [12:0] arxf,aryf;
always @(posedge CLK_VIDEO) begin
reg [11:0] oheight;
reg [11:0] oheight,wres;
reg [12:0] arxf,aryf;
reg [3:0] cnt;
reg narrow;
div_start <= 0;
mul_start <= 0;
if (!scale || !ary_i || !arx_i) begin
if (!SCALE || (!ary_i && arx_i)) begin
arxf <= arx_i;
aryf <= ary_i;
end
@ -181,44 +209,63 @@ always @(posedge CLK_VIDEO) begin
2: begin
oheight <= mul_res[11:0];
if(!ary_i) begin
cnt <= 8;
end
end
3: begin
mul_arg1 <= mul_res[11:0];
mul_arg2 <= arx_i;
mul_start <= 1;
end
3: begin
4: begin
div_num <= mul_res;
div_den <= ary_i;
div_start <= 1;
end
4: begin
5: begin
div_num <= div_res;
div_den <= hsize;
div_start <= 1;
end
5: begin
6: begin
mul_arg1 <= hsize;
mul_arg2 <= div_res[11:0] ? div_res[11:0] : 12'd1;
mul_start <= 1;
end
6: if(mul_res <= HDMI_WIDTH) cnt <= 8;
else begin
7: if(mul_res <= HDMI_WIDTH) begin
cnt <= 10;
end
8: begin
div_num <= HDMI_WIDTH;
div_den <= hsize;
div_start <= 1;
end
7: begin
9: begin
mul_arg1 <= hsize;
mul_arg2 <= div_res[11:0] ? div_res[11:0] : 12'd1;
mul_start <= 1;
end
8: begin
arxf <= {1'b1, ~scale[1] ? div_num[11:0] : (scale[0] && (wideres <= HDMI_WIDTH)) ? wideres : mul_res[11:0]};
10: begin
narrow <= ((div_num[11:0] - mul_res[11:0]) <= (wideres - div_num[11:0])) || (wideres > HDMI_WIDTH);
wres <= wideres;
end
11: begin
case(SCALE)
2: arxf <= {1'b1, mul_res[11:0]};
3: arxf <= {1'b1, (wres > HDMI_WIDTH) ? mul_res[11:0] : wres};
4: arxf <= {1'b1, narrow ? mul_res[11:0] : wres};
default: arxf <= {1'b1, div_num[11:0]};
endcase
aryf <= {1'b1, oheight};
end
endcase