diff --git a/TSConf.sv b/TSConf.sv index 236b9b9..5d4a283 100644 --- a/TSConf.sv +++ b/TSConf.sv @@ -62,7 +62,7 @@ localparam VGA_BITS = 6; localparam bit BIG_OSD = 1; -assign LED = ~ioctl_download & UART_TX & UART_RX; +assign LED = ~ioctl_download & ~ioctl_upload & UART_TX & UART_RX; assign UART_TX = 1'b1; @@ -70,37 +70,20 @@ assign UART_TX = 1'b1; localparam CONF_STR = { "TSConf;;", "O12,Scandoubler Fx,None,CRT 25%,CRT 50%,CRT 75%;", + "O4,Vsync,49 Hz,60 Hz;", + "O5,VDAC1,ON,OFF;", + "O6,CPU Type,CMOS,NMOS;", "-;", - "OU,CPU Type,CMOS,NMOS;", - "O67,CPU Speed,3.5MHz,7MHz,14MHz;", - "O8,CPU Cache,On,Off;", - "O9A,#7FFD span,128K,128K Auto,1024K,512K;", - "OLN,ZX Palette,Default,B.black,Light,Pale,Dark,Grayscale,Custom;", - "OPR,INT Offset,1,2,3,4,5,6,7,0;", - "-;", - "OBD,F11 Reset,boot.$C,sys.rom,ROM;", - "OEF, bank,TR-DOS,Basic 48,Basic 128,SYS;", - "OGI,Shift+F11 Reset,ROM,boot.$C,sys.rom;", - "OJK, bank,Basic 128,SYS,TR-DOS,Basic 48;", - "-;", - "T0,Reset and apply settings;", + "R256,Save NVRAM settings;", + "T0,Reset;", "V,v",`BUILD_DATE }; -wire [27:0] CMOSCfg; - -// fix default values -assign CMOSCfg[5:0] = 0; -assign CMOSCfg[7:6] = status[7:6]; -assign CMOSCfg[8] = ~status[8]; -assign CMOSCfg[10:9] = status[10:9] + 1'd1; -assign CMOSCfg[13:11]= (status[13:11] < 2) ? status[13:11] + 3'd3 : status[13:11] - 3'd2; -assign CMOSCfg[15:14]= status[15:14]; -assign CMOSCfg[18:16]= (status[18:16]) ? status[18:16] + 3'd2 : 3'd0; -assign CMOSCfg[20:19]= status[20:19] + 2'd2; -assign CMOSCfg[23:21]= status[23:21]; -assign CMOSCfg[24] = 0; -assign CMOSCfg[27:25]= status[27:25] + 1'd1; +wire st_reset = status[0]; +wire [1:0] st_scanlines = status[2:1]; +wire st_60hz = ~status[4]; +wire st_vdac = ~status[5]; +wire st_out0 = ~status[6]; //////////////////// CLOCKS /////////////////// @@ -235,7 +218,9 @@ user_io #(.STRLEN($size(CONF_STR)>>3), .SD_IMAGES(2), .FEATURES(32'h0 | (BIG_OSD wire ioctl_wr; wire [24:0] ioctl_addr; wire [7:0] ioctl_dout; +wire [7:0] ioctl_din; wire ioctl_download; +wire ioctl_upload; wire [5:0] ioctl_index; wire [1:0] ioctl_ext_index; @@ -252,7 +237,9 @@ data_io data_io .ioctl_wr(ioctl_wr), .ioctl_addr(ioctl_addr), .ioctl_dout(ioctl_dout), + .ioctl_din(ioctl_din), .ioctl_download(ioctl_download), + .ioctl_upload(ioctl_upload), .ioctl_index({ioctl_ext_index, ioctl_index}) ); @@ -261,6 +248,7 @@ reg init_reset = 1; reg old_download; always @(posedge clk_sys) begin old_download <= ioctl_download; + if(ioctl_download) init_reset <= 1'b1; if(old_download & ~ioctl_download) init_reset <= 0; end @@ -336,13 +324,15 @@ tsconf tsconf .SOUND_L(SOUND_L), .SOUND_R(SOUND_R), - .COLD_RESET(init_reset | status[0]), + .COLD_RESET(init_reset | st_reset), .WARM_RESET(buttons[1]), .RTC(rtc), - .OUT0(~status[30]), .TAPE_IN(UART_RX), - .CMOSCfg(CMOSCfg), + .CFG_OUT0(st_out0), + .CFG_60HZ(st_60hz), + .CFG_SCANDOUBLER(1'b0), + .CFG_VDAC(st_vdac), .PS2_KEY({key_strobe,key_pressed,key_extended,key_code}), .PS2_MOUSE(ps2_mouse), @@ -350,8 +340,10 @@ tsconf tsconf .loader_act(ioctl_download), .loader_addr(ioctl_addr[15:0]), - .loader_data(ioctl_dout), - .loader_wr(ioctl_wr && ioctl_download && !ioctl_index && !ioctl_addr[24:16]) + .loader_do(ioctl_dout), + .loader_di(ioctl_din), + .loader_wr_rom(ioctl_wr && ioctl_download && !ioctl_index && !ioctl_addr[24:16]), + .loader_wr_cmos(ioctl_wr && ioctl_download && ioctl_index == 6'h3f) ); @@ -372,7 +364,7 @@ mist_video #(.COLOR_DEPTH(8), .SD_HCNT_WIDTH(11), .OUT_COLOR_DEPTH(VGA_BITS), .B .SPI_DI ( SPI_DI ), // scanlines (00-none 01-25% 10-50% 11-75%) - // .scanlines ( status[2:1] ), + .scanlines ( st_scanlines ), // non-scandoubled pixel clock divider 0 - clk_sys/4, 1 - clk_sys/2 .ce_divider ( 3'd2 ), diff --git a/rtl/periph/mc146818a.v b/rtl/periph/mc146818a.v index 31fc019..ac97a7d 100644 --- a/rtl/periph/mc146818a.v +++ b/rtl/periph/mc146818a.v @@ -12,13 +12,17 @@ module mc146818a input CS, input [64:0] RTC, - input [31:0] CMOSCfg, - input [7:0] KEYSCANCODE, + input WR, input [7:0] A, input [7:0] DI, - output [7:0] DO + output [7:0] DO, + + input loader_WR, + input [7:0] loader_A, + input [7:0] loader_DI, + output [7:0] loader_DO ); reg [18:0] pre_scaler =0; @@ -59,18 +63,6 @@ always @(*) begin 8'h0c : Dout <= c_reg; 8'h0d : Dout <= 8'b10000000; - // 8'hb1 : Dout <= CMOSCfg[7:6]; // CPU Speed - // 8'hb2 : Dout <= 0; // Boot device - // 8'hb3 : Dout <= CMOSCfg[8]; // CPU Cache - // 8'hb4 : Dout <= CMOSCfg[13:11]; // F11 - // 8'hb5 : Dout <= CMOSCfg[15:14]; // F11 bank - // 8'hb6 : Dout <= CMOSCfg[18:16]; // Shift+F11 - // 8'hb7 : Dout <= CMOSCfg[20:19]; // Shift+F11 bank - // 8'hb8 : Dout <= CMOSCfg[10:9]; // #7FFD - // 8'hb9 : Dout <= CMOSCfg[23:21]; // ZX Palette - // 8'hba : Dout <= CMOSCfg[24]; // NGS Reset - // 8'hbb : Dout <= CMOSCfg[27:25]; // INT offset - 8'hf0 : Dout <= KEYSCANCODE; default: Dout <= CMOS_Dout; endcase @@ -86,7 +78,7 @@ always @(posedge CLK) begin year_reg <= RTC[47:40]; weeks_reg <= RTC[55:48] + 1'b1; b_reg <= 8'b00000010; - end + end if (RESET) b_reg <= 8'b00000010; else if (WR & CS) begin @@ -239,7 +231,11 @@ dpram #(.DATAWIDTH(8), .ADDRWIDTH(8), .MEM_INIT_FILE("rtl/periph/CMOS.mif")) CMO .address_a (A), .data_a (DI), .wren_a (WR & CS), - .q_a (CMOS_Dout) + .q_a (CMOS_Dout), + .address_b (loader_A), + .data_b (loader_DI), + .wren_b (loader_WR), + .q_b (loader_DO) ); endmodule diff --git a/rtl/tsconf.v b/rtl/tsconf.v index 8fe3feb..22a3f9b 100644 --- a/rtl/tsconf.v +++ b/rtl/tsconf.v @@ -44,10 +44,14 @@ module tsconf input COLD_RESET, input WARM_RESET, input [64:0] RTC, - input [31:0] CMOSCfg, - input OUT0, input TAPE_IN, + // Configuration bits + input CFG_OUT0, + input CFG_60HZ, + input CFG_SCANDOUBLER, + input CFG_VDAC, + // User input input [10:0] PS2_KEY, input [24:0] PS2_MOUSE, @@ -55,8 +59,10 @@ module tsconf input loader_act, input [15:0] loader_addr, - input [7:0] loader_data, - input loader_wr + input [7:0] loader_do, + output [7:0] loader_di, + input loader_wr_rom, + input loader_wr_cmos ); wire f0, f1, h0, h1, c0, c1, c2, c3; @@ -98,11 +104,11 @@ module tsconf wire cfg_tape_sound = 1'b0; wire cfg_floppy_swap = 1'b0; wire int_start_wtp = 1'b0; - wire cfg_60hz = 1'b0; + wire cfg_60hz = CFG_60HZ; wire beeper_mux; // what is mixed to FPGA beeper output - beeper(0) or tapeout(1) wire tape_read; // tapein data wire set_nmi; - wire cfg_vga_on = 1'b0; + wire cfg_vga_on = CFG_SCANDOUBLER; // nmi signals wire gen_nmi; @@ -326,6 +332,16 @@ module tsconf wire [15:0] dram_do; wire [15:0] dram_docpu; + wire [1:0] vred; + wire [1:0] vgrn; + wire [1:0] vblu; + wire [7:0] vred_vdac; + wire [7:0] vgrn_vdac; + wire [7:0] vblu_vdac; + assign VRED = CFG_VDAC? vred_vdac : {vred,vred,vred,vred}; + assign VGRN = CFG_VDAC? vgrn_vdac : {vgrn,vgrn,vgrn,vgrn}; + assign VBLU = CFG_VDAC? vblu_vdac : {vblu,vblu,vblu,vblu}; + wire fclk = clk & ce; @@ -488,8 +504,8 @@ module tsconf .tm_next(tm_next), .loader_clk(clk), .loader_addr(loader_addr), - .loader_data(loader_data), - .loader_wr(loader_wr) + .loader_data(loader_do), + .loader_wr(loader_wr_rom) ); video_top video_top @@ -502,9 +518,9 @@ module tsconf .c0(c0), .c1(c1), .c3(c3), - .vred(), - .vgrn(), - .vblu(), + .vred(vred), + .vgrn(vgrn), + .vblu(vblu), .vred_raw(vred_raw), .vgrn_raw(vgrn_raw), .vblu_raw(vblu_raw), @@ -575,9 +591,9 @@ module tsconf .o_r(vred_raw), .o_g(vgrn_raw), .o_b(vblu_raw), - .v_r(VRED), - .v_g(VGRN), - .v_b(VBLU) + .v_r(vred_vdac), + .v_g(vgrn_vdac), + .v_b(vblu_vdac) ); zmaps zmaps @@ -882,7 +898,7 @@ module tsconf .RD_n(rd_n), .WR_n(wr_n), .RFSH_n(rfsh_n), - .OUT0(OUT0), + .OUT0(CFG_OUT0), .A(a), .DI(di), .DO(d) @@ -927,16 +943,19 @@ module tsconf mc146818a mc146818a ( .RESET(rst), - .CLK(fclk), + .CLK(clk), .ENA(ena_0_4375mhz), .CS(1), - .KEYSCANCODE(key_scancode), .RTC(RTC), - .CMOSCfg(CMOSCfg), + .KEYSCANCODE(key_scancode), .WR(wait_start_gluclock & ~wr_n), .A(wait_addr), .DI(d), - .DO(wait_read) + .DO(wait_read), + .loader_WR(loader_wr_cmos), + .loader_A(loader_addr[7:0]), + .loader_DI(loader_do), + .loader_DO(loader_di) ); diff --git a/rtl/tune.v b/rtl/tune.v index 8c86cd5..8ac78cd 100644 --- a/rtl/tune.v +++ b/rtl/tune.v @@ -26,3 +26,5 @@ // `define PENT_312 // for Pentagon 71680 tacts emulation with 312 video lines `define KEMPSTON_8BIT // 8-bit enhanced Kempston Joystick interface + +`define ENABLE_60HZ