mirror of
https://github.com/UzixLS/TSConf_MiST.git
synced 2025-07-19 07:11:22 +03:00
Update sys. Re-organize the sources.
This commit is contained in:
sorgelig
467
rtl/video/video_top.v
Normal file
467
rtl/video/video_top.v
Normal file
@ -0,0 +1,467 @@
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// This module is a video top-level
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module video_top
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(
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// clocks
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input wire clk,
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input wire f0, f1,
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input wire h0, h1,
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input wire c0, c1, c2, c3,
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// input wire t0, // debug!!!
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// video DAC
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output wire [7:0] vred,
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output wire [7:0] vgrn,
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output wire [7:0] vblu,
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output wire vdac_mode,
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// video syncs
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output wire hsync,
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output wire vsync,
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output wire hblank,
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output wire vblank,
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output wire pix_stb,
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// Z80 controls
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input wire [ 7:0] d,
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input wire [15:0] zmd,
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input wire [ 7:0] zma,
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input wire cram_we,
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input wire sfile_we,
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// port write strobes
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input wire zborder_wr,
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input wire border_wr,
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input wire zvpage_wr,
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input wire vpage_wr,
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input wire vconf_wr,
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input wire gx_offsl_wr,
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input wire gx_offsh_wr,
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input wire gy_offsl_wr,
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input wire gy_offsh_wr,
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input wire t0x_offsl_wr,
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input wire t0x_offsh_wr,
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input wire t0y_offsl_wr,
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input wire t0y_offsh_wr,
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input wire t1x_offsl_wr,
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input wire t1x_offsh_wr,
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input wire t1y_offsl_wr,
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input wire t1y_offsh_wr,
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input wire tsconf_wr,
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input wire palsel_wr,
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input wire tmpage_wr,
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input wire t0gpage_wr,
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input wire t1gpage_wr,
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input wire sgpage_wr,
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input wire hint_beg_wr ,
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input wire vint_begl_wr,
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input wire vint_begh_wr,
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// ZX controls
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input wire res,
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output wire int_start,
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output wire line_start_s,
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// DRAM interface
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output wire [20:0] video_addr,
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output wire [ 4:0] video_bw,
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output wire video_go,
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input wire [15:0] dram_rdata, // raw, should be latched by c2 (video_next)
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input wire video_next,
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input wire video_pre_next,
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input wire next_video,
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input wire video_strobe,
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output wire [20:0] ts_addr,
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output wire ts_req,
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input wire ts_pre_next,
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input wire ts_next,
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output wire [20:0] tm_addr,
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output wire tm_req,
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input wire tm_next
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);
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// video config
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wire [7:0] vpage; // re-latched at line_start
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wire [7:0] vconf; //
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wire [8:0] gx_offs; //
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wire [8:0] gy_offs; //
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wire [7:0] palsel; //
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wire [8:0] t0x_offs; //
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wire [8:0] t1x_offs; //
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wire [7:0] t0gpage; //
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wire [7:0] t1gpage; //
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wire [7:0] sgpage; // * not yet !!!
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wire [8:0] t0y_offs;
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wire [8:0] t1y_offs;
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wire [7:0] tsconf;
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wire [7:0] tmpage;
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wire [7:0] hint_beg;
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wire [8:0] vint_beg;
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wire [8:0] hpix_beg;
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wire [8:0] hpix_end;
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wire [8:0] vpix_beg;
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wire [8:0] vpix_end;
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wire [8:0] hpix_beg_ts;
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wire [8:0] hpix_end_ts;
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wire [8:0] vpix_beg_ts;
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wire [8:0] vpix_end_ts;
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wire [5:0] x_tiles;
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wire [9:0] x_offs_mode;
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wire [4:0] go_offs;
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wire [1:0] render_mode;
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wire tv_hires;
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wire nogfx = vconf[5];
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wire notsu = vconf[4];
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wire gfxovr = vconf[3];
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wire tv_hblank;
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wire tv_vblank;
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// counters
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wire [7:0] cnt_col;
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wire [8:0] cnt_row;
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wire cptr;
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wire [3:0] scnt;
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wire [8:0] lcount;
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// synchro
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wire frame_start;
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wire pix_start;
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wire tv_pix_start;
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wire ts_start;
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wire v_ts;
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wire v_pf;
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wire hpix;
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wire vpix;
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wire hvpix;
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wire hvtspix;
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wire flash;
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// fetcher
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wire [31:0] fetch_data;
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wire [31:0] fetch_temp;
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wire [3:0] fetch_sel;
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wire [1:0] fetch_bsl;
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wire fetch_stb;
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// video data
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wire [7:0] border;
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wire [7:0] vplex;
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// TS
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wire tsr_go;
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wire [5:0] tsr_addr;
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wire [8:0] tsr_line;
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wire [7:0] tsr_page;
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wire [8:0] tsr_x;
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wire [2:0] tsr_xs;
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wire tsr_xf;
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wire [3:0] tsr_pal;
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wire tsr_rdy;
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// TS-line
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wire [8:0] ts_waddr;
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wire [7:0] ts_wdata;
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wire ts_we;
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wire [8:0] ts_raddr;
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video_ports video_ports
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(
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.clk (clk),
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.d (d),
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.res (res),
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.line_start_s (line_start_s),
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.border_wr (border_wr),
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.zborder_wr (zborder_wr),
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.zvpage_wr (zvpage_wr),
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.vpage_wr (vpage_wr),
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.vconf_wr (vconf_wr),
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.gx_offsl_wr (gx_offsl_wr),
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.gx_offsh_wr (gx_offsh_wr),
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.gy_offsl_wr (gy_offsl_wr),
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.gy_offsh_wr (gy_offsh_wr),
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.t0x_offsl_wr (t0x_offsl_wr),
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.t0x_offsh_wr (t0x_offsh_wr),
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.t0y_offsl_wr (t0y_offsl_wr),
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.t0y_offsh_wr (t0y_offsh_wr),
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.t1x_offsl_wr (t1x_offsl_wr),
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.t1x_offsh_wr (t1x_offsh_wr),
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.t1y_offsl_wr (t1y_offsl_wr),
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.t1y_offsh_wr (t1y_offsh_wr),
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.palsel_wr (palsel_wr),
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.hint_beg_wr (hint_beg_wr),
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.vint_begl_wr (vint_begl_wr),
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.vint_begh_wr (vint_begh_wr),
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.tsconf_wr (tsconf_wr),
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.tmpage_wr (tmpage_wr),
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.t0gpage_wr (t0gpage_wr),
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.t1gpage_wr (t1gpage_wr),
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.sgpage_wr (sgpage_wr),
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.border (border),
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.vpage (vpage),
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.vconf (vconf),
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.gx_offs (gx_offs),
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.gy_offs (gy_offs),
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.t0x_offs (t0x_offs),
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.t1x_offs (t1x_offs),
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.t0y_offs (t0y_offs),
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.t1y_offs (t1y_offs),
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.palsel (palsel),
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.hint_beg (hint_beg),
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.vint_beg (vint_beg),
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.int_start (0),
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.tsconf (tsconf),
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.tmpage (tmpage),
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.t0gpage (t0gpage),
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.t1gpage (t1gpage),
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.sgpage (sgpage)
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);
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video_mode video_mode
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(
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.clk (clk),
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.f1 (f1),
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.c3 (c3),
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.vpage (vpage),
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.vconf (vconf),
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.fetch_sel (fetch_sel),
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.fetch_bsl (fetch_bsl),
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.fetch_cnt (scnt),
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.fetch_stb (fetch_stb),
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.txt_char (fetch_temp[15:0]),
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.gx_offs (gx_offs),
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.x_offs_mode (x_offs_mode),
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.ts_rres_ext (tsconf[0]),
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.hpix_beg (hpix_beg),
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.hpix_end (hpix_end),
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.vpix_beg (vpix_beg),
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.vpix_end (vpix_end),
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.hpix_beg_ts (hpix_beg_ts),
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.hpix_end_ts (hpix_end_ts),
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.vpix_beg_ts (vpix_beg_ts),
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.vpix_end_ts (vpix_end_ts),
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.x_tiles (x_tiles),
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.go_offs (go_offs),
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.cnt_col (cnt_col),
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.cnt_row (cnt_row),
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.cptr (cptr),
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.line_start_s (line_start_s),
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.pix_start (pix_start),
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.tv_hires (tv_hires),
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.pix_stb (pix_stb),
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.render_mode (render_mode),
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.video_addr (video_addr),
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.video_bw (video_bw)
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);
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video_sync video_sync
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(
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.clk (clk),
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.f1 (f1),
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.c0 (c0),
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.c1 (c1),
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.c3 (c3),
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.hpix_beg (hpix_beg),
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.hpix_end (hpix_end),
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.vpix_beg (vpix_beg),
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.vpix_end (vpix_end),
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.hpix_beg_ts (hpix_beg_ts),
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.hpix_end_ts (hpix_end_ts),
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.vpix_beg_ts (vpix_beg_ts),
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.vpix_end_ts (vpix_end_ts),
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.go_offs (go_offs),
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.x_offs (x_offs_mode[1:0]),
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.y_offs_wr (gy_offsl_wr || gy_offsh_wr),
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.line_start_s (line_start_s),
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.hint_beg (hint_beg),
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.vint_beg (vint_beg),
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.hsync (hsync),
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.vsync (vsync),
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.tv_hblank (tv_hblank),
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.tv_vblank (tv_vblank),
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.ts_raddr (ts_raddr),
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.lcount (lcount),
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.cnt_col (cnt_col),
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.cnt_row (cnt_row),
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.cptr (cptr),
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.scnt (scnt),
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.flash (flash),
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.pix_stb (pix_stb),
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.pix_start (pix_start),
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.ts_start (ts_start),
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.cstart (x_offs_mode[9:2]),
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.rstart (gy_offs),
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.frame_start (frame_start),
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.int_start (int_start),
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.v_pf (v_pf),
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.hpix (hpix),
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.v_ts (v_ts),
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.vpix (vpix),
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.hvpix (hvpix),
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.hvtspix (hvtspix),
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.nogfx (nogfx),
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.video_go (video_go),
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.video_pre_next(video_pre_next)
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);
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video_fetch video_fetch
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(
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.clk (clk),
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.f_sel (fetch_sel),
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.b_sel (fetch_bsl),
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.fetch_stb (fetch_stb),
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.fetch_data (fetch_data),
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.fetch_temp (fetch_temp),
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.video_strobe (video_strobe),
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.video_data (dram_rdata)
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);
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video_ts video_ts
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(
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.clk (clk),
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.start (ts_start),
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.line (lcount),
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.v_ts (v_ts),
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.tsconf (tsconf),
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.t0gpage (t0gpage),
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.t1gpage (t1gpage),
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.sgpage (sgpage),
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.tmpage (tmpage),
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.num_tiles (x_tiles),
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.v_pf (v_pf),
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.t0x_offs (t0x_offs),
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.t1x_offs (t1x_offs),
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.t0y_offs (t0y_offs),
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.t1y_offs (t1y_offs),
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.t0_palsel (palsel[5:4]),
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.t1_palsel (palsel[7:6]),
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.dram_addr (tm_addr),
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.dram_req (tm_req),
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.dram_next (tm_next),
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.dram_rdata (dram_rdata),
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.tsr_go (tsr_go),
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.tsr_addr (tsr_addr),
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.tsr_line (tsr_line),
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.tsr_page (tsr_page),
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.tsr_pal (tsr_pal),
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.tsr_x (tsr_x),
|
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.tsr_xs (tsr_xs),
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.tsr_xf (tsr_xf),
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.tsr_rdy (tsr_rdy),
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.sfile_addr_in (zma),
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.sfile_data_in (zmd),
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.sfile_we (sfile_we)
|
||||
);
|
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|
||||
video_ts_render video_ts_render
|
||||
(
|
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.clk (clk),
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|
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.reset (ts_start),
|
||||
|
||||
.tsr_go (tsr_go),
|
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.addr (tsr_addr),
|
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.line (tsr_line),
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||||
.page (tsr_page),
|
||||
.pal (tsr_pal),
|
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.x_coord (tsr_x),
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.x_size (tsr_xs),
|
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.flip (tsr_xf),
|
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.mem_rdy (tsr_rdy),
|
||||
|
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.ts_waddr (ts_waddr),
|
||||
.ts_wdata (ts_wdata),
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.ts_we (ts_we),
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||||
|
||||
.dram_addr (ts_addr),
|
||||
.dram_req (ts_req),
|
||||
.dram_pre_next (ts_pre_next),
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.dram_next (ts_next),
|
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.dram_rdata (dram_rdata)
|
||||
);
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||||
|
||||
|
||||
video_render video_render
|
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(
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.clk (clk),
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.c1 (c1),
|
||||
.hvpix (hvpix),
|
||||
.hvtspix (hvtspix),
|
||||
.nogfx (nogfx),
|
||||
.notsu (notsu),
|
||||
.gfxovr (gfxovr),
|
||||
.flash (flash),
|
||||
.hires (tv_hires),
|
||||
.psel (scnt),
|
||||
.palsel (palsel[3:0]),
|
||||
.render_mode (render_mode),
|
||||
.data (fetch_data),
|
||||
.border_in (border),
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.tsdata_in (ts_rdata),
|
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.vplex_out (vplex)
|
||||
);
|
||||
|
||||
video_out video_out
|
||||
(
|
||||
.clk (clk),
|
||||
.c3 (c3),
|
||||
.tv_blank (tv_hblank|tv_vblank),
|
||||
.palsel (palsel[3:0]),
|
||||
.plex_sel_in ({h1, f1}),
|
||||
.tv_hires (tv_hires),
|
||||
.cram_addr_in (zma),
|
||||
.cram_data_in (zmd[15:0]),
|
||||
.cram_we (cram_we),
|
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.vplex_in (vplex),
|
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.vred (vred),
|
||||
.vgrn (vgrn),
|
||||
.vblu (vblu),
|
||||
.vdac_mode (vdac_mode)
|
||||
);
|
||||
|
||||
assign hblank = tv_hblank;
|
||||
assign vblank = tv_vblank;
|
||||
|
||||
// 2 buffers: 512 pixels * 8 bits (9x8) - used as bitmap buffer for TS overlay over graphics
|
||||
// (2 altdprams)
|
||||
wire tl_act0 = lcount[0];
|
||||
wire tl_act1 = ~lcount[0];
|
||||
wire [8:0] ts_waddr0 = tl_act0 ? ts_raddr : ts_waddr;
|
||||
wire [7:0] ts_wdata0 = tl_act0 ? 8'd0 : ts_wdata;
|
||||
wire ts_we0 = tl_act0 ? c3 : ts_we;
|
||||
wire [8:0] ts_waddr1 = tl_act1 ? ts_raddr : ts_waddr;
|
||||
wire [7:0] ts_wdata1 = tl_act1 ? 8'd0 : ts_wdata;
|
||||
wire ts_we1 = tl_act1 ? c3 : ts_we;
|
||||
wire [7:0] ts_rdata = tl_act0 ? ts_rdata0 : ts_rdata1;
|
||||
wire [7:0] ts_rdata0, ts_rdata1;
|
||||
|
||||
dpram #(.ADDRWIDTH(9)) video_tsline0
|
||||
(
|
||||
.clock (clk),
|
||||
.address_a (ts_waddr0),
|
||||
.data_a (ts_wdata0),
|
||||
.wren_a (ts_we0),
|
||||
.address_b (ts_raddr),
|
||||
.q_b (ts_rdata0)
|
||||
);
|
||||
|
||||
dpram #(.ADDRWIDTH(9)) video_tsline1
|
||||
(
|
||||
.clock (clk),
|
||||
.address_a (ts_waddr1),
|
||||
.data_a (ts_wdata1),
|
||||
.wren_a (ts_we1),
|
||||
.address_b (ts_raddr),
|
||||
.q_b (ts_rdata1)
|
||||
);
|
||||
|
||||
endmodule
|
||||
Reference in New Issue
Block a user