Convert tsconf.vhd to verilog for easier maintanance.

TSConf-lite.qsf

@@ -399,7 +399,7 @@ set_global_assignment -name VERILOG_FILE src/kempston_mouse.v
 set_global_assignment -name VERILOG_FILE src/spi.v
 set_global_assignment -name VHDL_FILE src/sdram.vhd
 set_global_assignment -name VERILOG_FILE src/clock.v
-set_global_assignment -name VHDL_FILE src/tsconf.vhd
+set_global_assignment -name VERILOG_FILE src/tsconf.v
 set_global_assignment -name SYSTEMVERILOG_FILE ddram.sv
 set_global_assignment -name VERILOG_FILE dpram.v
 set_global_assignment -name SYSTEMVERILOG_FILE TSConf.sv

TSConf.qsf

@@ -357,6 +357,7 @@ set_location_assignment PIN_W21 -to SW[2]
 set_location_assignment PIN_W20 -to SW[3]
 
 set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:sys/build_id.tcl"
+
 set_global_assignment -name CDF_FILE jtag.cdf
 set_global_assignment -name QIP_FILE sys/sys.qip
 set_global_assignment -name QSYS_FILE sys/vip.qsys
@@ -404,7 +405,8 @@ set_global_assignment -name VERILOG_FILE src/kempston_mouse.v
 set_global_assignment -name VERILOG_FILE src/spi.v
 set_global_assignment -name VHDL_FILE src/sdram.vhd
 set_global_assignment -name VERILOG_FILE src/clock.v
-set_global_assignment -name VHDL_FILE src/tsconf.vhd
+set_global_assignment -name VERILOG_FILE src/tsconf.v
 set_global_assignment -name SYSTEMVERILOG_FILE ddram.sv
 set_global_assignment -name VERILOG_FILE dpram.v
-set_global_assignment -name SYSTEMVERILOG_FILE TSConf.svset_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_global_assignment -name SYSTEMVERILOG_FILE TSConf.sv
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top