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Convert tsconf.vhd to verilog for easier maintanance.

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sorgelig
2018-08-20 00:47:23 +08:00
parent 550ee59c7e
commit 398cb1e4d1
4 changed files with 1005 additions and 1556 deletions
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2
TSConf-lite.qsf
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@ -399,7 +399,7 @@ set_global_assignment -name VERILOG_FILE src/kempston_mouse.v
set_global_assignment -name VERILOG_FILE src/spi.v
set_global_assignment -name VHDL_FILE src/sdram.vhd
set_global_assignment -name VERILOG_FILE src/clock.v
set_global_assignment -name VHDL_FILE src/tsconf.vhd
set_global_assignment -name VERILOG_FILE src/tsconf.v
set_global_assignment -name SYSTEMVERILOG_FILE ddram.sv
set_global_assignment -name VERILOG_FILE dpram.v
set_global_assignment -name SYSTEMVERILOG_FILE TSConf.sv