uzix/TSConf_MiST
1
0
Fork 0
mirror of https://github.com/UzixLS/TSConf_MiST.git synced 2025-07-18 14:51:25 +03:00
Code Issues Packages Projects Releases Wiki Activity

RTC: disable alarm options.

Browse Source
This commit is contained in:
sorgelig
2018-08-21 15:27:41 +08:00
parent ff3ab93d69
commit 14328be1d6
1 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
src/rtc/mc146818a.vhd
View File

@ -56,11 +56,11 @@ begin
-- 14 Bytes of Clock and Control Registers Read -- 14 Bytes of Clock and Control Registers Read
case A(7 downto 0) is case A(7 downto 0) is
when x"00" => Dout <= seconds_reg; when x"00" => Dout <= seconds_reg;
when x"01" => Dout <= seconds_alarm_reg; -- when x"01" => Dout <= seconds_alarm_reg;
when x"02" => Dout <= minutes_reg; when x"02" => Dout <= minutes_reg;
when x"03" => Dout <= minutes_alarm_reg; -- when x"03" => Dout <= minutes_alarm_reg;
when x"04" => Dout <= hours_reg; when x"04" => Dout <= hours_reg;
when x"05" => Dout <= hours_alarm_reg; -- when x"05" => Dout <= hours_alarm_reg;
when x"06" => Dout <= weeks_reg; when x"06" => Dout <= weeks_reg;
when x"07" => Dout <= days_reg; when x"07" => Dout <= days_reg;
when x"08" => Dout <= month_reg; when x"08" => Dout <= month_reg;
@ -147,11 +147,11 @@ begin
a_reg(7) <= '1'; a_reg(7) <= '1';
c_reg(4) <= '1'; c_reg(4) <= '1';
-- alarm -- alarm
if ((seconds_reg = seconds_alarm_reg) and -- if ((seconds_reg = seconds_alarm_reg) and
(minutes_reg = minutes_alarm_reg) and -- (minutes_reg = minutes_alarm_reg) and
(hours_reg = hours_alarm_reg)) then -- (hours_reg = hours_alarm_reg)) then
c_reg(5) <= '1'; -- c_reg(5) <= '1';
end if; -- end if;
-- DM binary-coded-decimal (BCD) data mode -- DM binary-coded-decimal (BCD) data mode
--if b_reg(2) = '0' then --if b_reg(2) = '0' then
if seconds_reg(3 downto 0) /= "1001" then if seconds_reg(3 downto 0) /= "1001" then